Design and implementation of multi‐channel moving target radar signal simulator

The development of radar signal simulator in specific environment can effectively accelerate the debugging process of radar system and reduce the consumption of human, material, and financial resources. This study analyses the mathematical model of the IF radar signal in aerial distributed semi-active radar system and deduces the parameters of radar signals based on direct digital synthesiser (DDS) technology. After solving the problem of multi-channel synchronisation, delay precision control, and envelope delay compensation, an IF radar signal simulator system was designed and implemented, which can generate three direct-path-wave signals and three echo signals.


Introduction
It can effectively accelerate the debugging process of radar system by developing the radar signal simulator.
The simulation scenario in this paper is the aerial distributed semi-active radar system. In aerial distributed semi-active radar systems, the signals emitted by ground wide-beam radar are simultaneously illuminated to targets and multiple distributed radar receivers in the air. The radar receiver receives the direct-pathwave directly irradiated by the radar transmitter and the reflected wave (also called echo) reflected by the target. The signal processing unit completes the Doppler frequency tracking and distance information extraction by performing down-conversion, analogue-to-digital conversion, and matched filter processing on the received signal, and searches and tracks the moving target. Multiple receivers work on the same principle and work together, one serves as master and others serve as slaves, so as to achieve accurate search and tracking of moving targets. The simulator designed in this paper takes three receivers as an example to simulate the generation of three-channel intermediate frequency (IF) direct-path-wave and three-channel IF echo.
For the generation of radar signal, this paper adopts the scheme to implement DDS technology in FPGA. FPGA transmits the phase data of waveform to the high-speed DA chip, and the DA chip outputs analogue waveforms.
In this paper, a multi-channel moving target radar signal simulator is designed and implemented. In the second section, the mathematical model of IF direct-path-wave and IF echo in airborne semi-active radar system is analysed in detail and the waveform generation parameters based on DDS technology are deduced. In the third section, the design scheme of radar signal simulator system is introduced. The multi-channel synchronisation, delay precision control, and phase compensation of envelope delay are discussed, and the feasible solution is put forward. Finally, both the implemented hardware of simulator and the waveform generation results of this simulator are displayed.

Radar system and signal model
The ground radar in this system is a pulsed Doppler (PD) radar. PD radar transmits pulse-modulated signal and uses the Doppler effect generated by the relative motion between the target and the radar to extract and process the target information [1,2]. PD radar that adopts the linear frequency modulation (LFM) signal can not only conduct the process of moving target identification (MTI), but also be featured with long detection range and high resolution of range and velocity.
PD radar that equipped with LFM signal transmits coherent LFM pulse train. The signal discussed in this paper is narrow-band signal.

Radar transmit signal
Let t m represent the slow time and t^ represent the fast time. The slow time indicates the moment of emitting and can be expressed as t m = (m − 1)T p , (m = 1, 2…), where T p is the pulse repetition interval. The relationship between t m , t^ and the full time t is The m th LFM pulse signal transmitted by the radar can be expressed as: where is rectangle function, T is the pulse width, f c is the carrier frequency, and μ is the LFM modulation index.

Direct-Path-Wave channel signal
It is assumed that the radar receiver is moving at a uniform speed and the relative velocity with the ground radar is V m (Set away from the ground radar to positive direction). The initial radial distance between the radar receiver and the ground radar is R IM . At the moment t, the distance between ground radar and radar receiver is R M (t) = R IM + V m t. Then, the received direct-path-wave is: is the delay of direct-path-wave and Under the condition of narrow-band signal, the relationship between the signal delay of the direct-path-wave and the number of pulses m is: Incorporating (4) in (3) and making the down-conversion, (3) can be rewritten as follows: where f 0 is the intermediate frequency.

Echo channel signal
It is assumed that the target is moving at a uniform speed and relative velocity of target and ground radar is −V t (Set away from the ground radar to positive direction). The initial radial distance between the target and the ground radar is R IT . Under the condition of far field, the initial radial distance between the target and the radar receiver is R TM = R IT − R IM . At the moment t, the relative distance between the target and the radar receiver is The relationship between signal delay of the echo and pulse number m is: According to the mathematical model of the direct-path-wave, the signal expression of the IF echo can be obtained by analogised: where f E = f c (V m + 2V t )/C is the Doppler frequency caused by the motion of the radar receiver and the target.

Phase analysis
For radar signal generation, this paper adopts DDS technology. DDS technology can produce arbitrary waveforms and accurately control the frequency and phase of the output waveform. DDS mainly includes phase accumulator, ROM and DA. DDCS adds frequency accumulator to the front-end of DDS and can generate LFM waveform. For LFM signals, the output phase of the DDCs can be expressed as [3]: where K 0 is the initial frequency control word, K 1 is the frequency control word step (frequency modulation slope control word), and P 0 is the initial phase word. Taking the IF direct-path-wave as an example. The starting point of each direct-path-wave is t m = (m − 1)T p . After performing coordinate transformation according to t^= t − t m , (3) can be expressed as: Then the echo phase decomposition model is: Compare with (8), the correspondence between the parameters is as follows:

Design of radar signal simulator
To implement the multi-channel moving target radar signal simulator, some key factors should be considered, such as the multi-channel synchronisation, delay precision control, and phase compensation of envelope delay.

Multi-Channel synchronous design
In the aerial distributed semi-active radar system, distributed radar receivers work together to improve the accuracy of distance measurement and speed measurement. Synchronisation between receivers is required, that is, the synchronisation between the direct-path-wave and the echo. Therefore, signal synchronisation between channels is an important part in the design of the multichannel signal simulator. In order to meet the needs of multi-channel signal synchronisation, DA chip selected ADI's AD9739. AD9739 is a 14-bit, 2,5GSPS high-performance RF DAC and supports multichip synchronisation operation [4]. Setting the chip in master mode or slave mode by configuring internal registers, and synchronising data among multiple AD9739 chips through synchronous output interface and synchronous input interface can realise the synchronous function.
In addition, the AD9739 work clock also needs to meet the high-frequency stability requirements. Therefore, the system selects the constant temperature crystal oscillator (10 MHz) with the frequency stability of 0.01 ppm and the clock multiplier chip selects the HMC832A. The HMC832A is a high-performance, wideband, divide-by-N, integrated VCO phase-locked loop chip that generates continuous frequencies from 25 MHz to 3000 MHz [5]. Industry leading phase noise and spurious performance, across all frequencies, enable the HMC832A to minimise blocker effects, and to improve receiver sensitivity and transmitter spectral purity.
The final multi-channel synchronous design is shown in Fig. 1. The detailed requirements to achieve multi-chip AD9739 chip synchronisation are as follows: in the hardware design to achieve the following equal length: clock buffer supply 6 AD9739 clock lines to all equal length; FPGA and AD9739 between the clock synchronisation pin DCO and DCI need to be equal length; clock buffer supply AD9739 synchronous clock lines need to all the same length.

Delay precision control and Multiplex parallel processing method
The accuracy of the generated waveform data and the stability of the output signal are the key factors that affect the actual performance of the radar processor. In the design, the main considerations are the initial phase precision of the direct-pathwave and the echo, the envelope delay, as well as the additional Doppler modulation frequency requirements. In practice, due to the limitation of FPGA devices, it is necessary to adopt the method of multiplex parallel processing to obtain high precision delay and phase requirements (Fig. 2).
Specific operations are as follows: First, get the waveform data whose sampling rate is 1.6 GHz, then split it into eight channels, each channel down to 200 MHz data stream. Second, make these eight channels data divided into even channels and odd channels according to section 2.4 derivation of the phase-parameters of the mathematical relationship. Third, make the four odd channels data synthesised to one channel data by parallel-serial conversion, so as to the four even channels data. The data rate of the two synthesised channel is 800 MHz. Finally, output the two synthesised channels data to the DA chip which generates waveform with 1.6 GHz data rate.
For the data precision of signal, the time interval resolution of 1.6 GHz sampled data is 0.625 ns, so the precision delay of signal and the control of initial phase of signal can be realised.
The multi-channel parallel processing method is shown in the following diagram.

Phase compensation analysis of envelope delay
Taking the direct-path-wave as an example, the envelope delay control is rect t^− R M (t)/C T p [7,8]. Suppose the clock frequency of the FPGA is F s , and sampling period is T s . The number of delay clocks per pulse implemented in the FPGA is: where symbol * represents a roundness operation. The number of delay clocks is the whole relation of FPGA working clock cycle. If F s is 200 MHz, the sampling period is 5 ns. In order to improve the precision of envelope delay and eliminate the phase problem caused by the pulse delay control unit, the delay control unit can be kept unchanged and compensated in the initial phase of the output signal. As shown in Fig. 3, the working clock F s is used to drive the output signal. The output signal is behind the initial phase of the actual sampled signal. In order to compensate for this defect, the initial phase is adjusted according to the output starting time.
As shown in Fig. 3, the compensated sampling signal is desired.

Hardware and experiment results
Based on the scheme design of the simulator mentioned above, the hardware board has been made as shown in the figure below (Fig. 4).
After the FPGA program design completed, different waveforms can be generated by setting different waveform parameters. One example is show in Fig. 5. As per the limit to the number of oscilloscope channels, there are four waves displayed. The first two waves represent direct-path-wave and the others represent echo. From the diagram, the delay control between these channels is demonstrated.

Conclusion
In this paper, the mathematical model of the radar signal in aerial distributed semi-active radar system is analysed and a multichannel moving target radar signal simulator is designed and  implemented. This simulator could be capable of generating threechannel direct-path-wave signals and three-channel echo signals.
The delay between these channels could be change by setting waveform parameters, which meet the requirement of the radar signal simulator.