Loop stability analysis of boost circuit under globally dynamic compensation strategy

: The PFC Boost converter controlled by the mode of CCM has strong non-linearity due to the use of non-linear elements such as power switch and multipliers. Here, a globally optimised control strategy of dynamic slope compensation is proposed to eliminate bifurcation, chaos behaviours. Time-varying adjustment of control efforts can achieve the optimal compensation within each switching cycle. First, the model and the system transfer function of the circuit controlled by the global dynamic slope compensation control mode have been derived and the stability of the system is analysed from the frequency domain at the same time. The voltage outer loop is used to compensate the worst-stability zero-crossing time, which ensures that the circuit meets the frequency domain stability requirements throughout the whole cycle. Finally, the experimental circuit has been built to verify the theory, it can be found that the theory has good prospects in practical application and promotion through comparison between the simulation and the measured circuit waveforms.


Introduction
The non-linear switchers and multipliers of AC-DC boost converters result in strong non-linear behaviours, such as fast timescale bifurcation and chaos [1,2]. Therefore, the fixed slope compensation strategy is proposed, the compensation voltage V m > 0.5V 0 − V i can ensure the stability of the circuit [3], although the fixed slope compensation expand the scope of the duty cycle, it results in the inductor current dead zone due to its constant compensation, which reduces the power factor and decreases the input power [4]. Aiming at the above insufficiency, a method of dynamic compensation is introduced, which can effectively eliminate the dead zone and improve the input power, the compensation intensity can be adjusted in real time in the whole power frequency cycle so that the compensation voltage V m = V 0 − V i , and ensure that the system has the strongest control efforts at any time. Finally, small-signal model of the peak current AC-DC Boost converter is derived and analysed to obtain the new equivalent power-level transfer function including the current loop. In order to compensate the current inner loop, the transfer function of the voltage outer loop is obtained, and the circuit simulation and experimental verification are carried out. The results show that globally dynamic compensation has good frequency domain response and application prospect (Table 1).

Analysis of fixed slope compensation
The principle of fixed slope compensation strategy is to add a small ramp signal based on the reference current, so that the circuit can eliminate the fast time-scale bifurcation and other behaviours. Fig. 1 is AC-DC Boost circuit of peak current mode structure: From the diagram, we can see that the control loop is composed of current inner loop and voltage outer loop. The current inner loop is obtained by multiplying the gain of the voltage outer loop with the input voltage and multiplying a certain ratio coefficient. In this way, the peak value of inductance current tracks the input voltage waveform, and the control signal of MOSFET is generated by comparing the peak value of inductance current with the reference current.
In order to eliminate the sub-harmonics oscillation of inductance current in the circuit, most scholars adopt the control strategy of fixed slope compensation. Fig. 2 is the curve of inductance current of fixed slope compensation: Table 1 Relevant parameters of equivalent power-level transfer function ∫ t n t n + t m n dt can be concluded from Fig. 2, the i in the diagram represents the inductance current, mc n t , −md n t , respectively, indicate charging and discharging slope, i n , i n + 1 , and i n + 2 , respectively, indicate inductive current at different times, D n is the duty cycle of T n , T is the switching period, i ref is the reference current after compensation. When the reference current equals to the rated input current, i ref ′ = 2I i sin 2πt/T 0 , it is concluded as follows: The average inductance current for each switching period may be expressed as: It is easy to see that the fixed slope compensation strategy reduces the average value of inductance current i av , the input current deviates from the input voltage waveform and occurs the dead zone from the above formula. At the same time, the input power is reduced to a certain extent.

Analysis of globally dynamic compensation
the disturbance error of the current can be eliminated in a switching period, the slope of compensation voltage is equal to that of inductance current, and the system has the strongest control efforts [5,6]. In order to overcome the shortcoming of fixed slope compensation, the reference current i ref ′ is considered as the disturbance object, the average value of inductance current is equal to the rated input current, the value of the reference current i ref is calculated by reverse derivation; at the same time, it is in the realtime adjustment of the slope compensation voltage during the whole frequency period, which makes the compensation voltage V m = V o − V i , the circuit can eliminate the disturbance error of inductor current in a switching cycle. Fig. 3 is the working curve of inductor current for dynamic optimisation slope compensation: The relation between two adjacent sampling points of current from the inductor current diagram can be expressed as: In order to realise sinusoidal input current and ensure the circuit can work stably, the average inductance current is simplified as follows: The Formula (5) can be concluded after linearisation of the inductance current rise and fall: In order to overcome the shortcoming of dead zone caused by the reduction of the average input current in the fixed slope compensation strategy, we make the average inductance current equal to the rated input current, which is i L av = 2I i sin 2πt/T 0 Combining with the duty cycle calculation formula of Boost circuit, the reference current i ref is expressed as: Compared with the reference current expressions of global dynamic optimisation compensation and the fixed slope compensation, it is easy to find that the average of the reference current and the inductive current of the dynamic slope compensation are raised, which overcomes the shortcoming that the input current of the fixed slope compensation is reduced [7]. Most importantly, the compensation voltage adjusts the control efforts in real time according to input voltage (Fig. 4). The slope of compensation voltage is equal to the slope of inductance current drop in each switching cycle, which can eliminate the disturbance error in one switching cycle. The stability of the system is improved.

Small signal modelling analysis and loop design
The current inner loop of PCM is stable after adding the slope signal, the new equivalent power level circuit is formed, which is constituted by the current inner loop and Boost main power circuit. The reasonable voltage outer loop is designed to meet the requirement of restraining output voltage fluctuation, transient response and output resistance. The block diagram of AC-DC Boost circuit of PCM is as follows: The establishment of AC small-signal model is the basis of the design of outer loop voltage [8]. The influence of inductance current ripple and slope compensation should be taken into account in the derivation of the transfer function of current inner loop. The First, the duty cycle is expressed by the control current, the input voltage, the output voltage and the compensation voltage slope, which is combined with the traditional power level transfer function of Boost converter, and the accurate model is obtained (Fig. 5).
According to the inductor current diagram of dynamic slope compensation, the average value of ripple of inductance current is expressed as d(mc n dT s /2) + d′(md n d′T s /2), the exact expression of inductance current is expressed as: Adding small signal disturbance into the exact expression of inductance current: md n = MD n + md n t mc n = MC n + mc n t m n = M n + m n It needs to be explained that the slope of compensation voltage is consistent with discharging slope in dynamic compensation, the charging slope mc n (t), discharging slope md n (t) and the slope of compensation voltage m n are linear functions of the input and output voltage, so it is reasonable to introduce the slope disturbance, mc n t = (v^i(t)/L), md n (t) = m n (t) = ((v^o(t) − v^i(t))/L), combing the perturbation equation with the expression of the average inductance current i L av and omitting high-order terms, then the d^t can be simplified as: Considering the expressions of charging slope mc n (t), discharging slope md n (t) and m n , the above formula can be simplified as: The parameters in the formula are expressed as F m = (1/M n T s ), So the expression between the duty cycle perturbation and other disturbances is obtained, and then combining the duty cycle perturbation expression with the traditional power Boost circuit transfer function, finally, the new expression of equivalent power level can be obtained. The frequency domain transfer function of traditional equivalent power level circuit is as follows: The four parameters G id G ig G vg G vd are given in [9] and they are no longer listed in detail here. The new equivalent power-level transfer function based on d^t and the traditional power-level transfer function. The expression is as follows: Where the parameters are expressed in the Table 1.
The transfer function of the equivalent power level has been concluded, the design of the voltage outer loop is connected with circuit parameters and the Boost circuit is designed. The main parameters in the circuit are as follows ( Table 2).
The input voltage of AC-DC Boost circuit rises from zero to peak value and then decreases to zero after the rectifier bridge. The duty cycle changes periodically with the input voltage, when the input voltage is zero. It is found that the duty cycle tends to infinity according to the calculation formula of duty cycle of Boost circuit, which is obviously not possible. At present, the upper limit of duty cycle of most chips is about 0.95. The transfer function of equivalent power is simplified as a function of duty cycle as an independent variable. The frequency response is analysed when the voltage changes periodically. Finally, the transfer function of the voltage outer loop is designed to compensate the current inner loop, and the experimental circuit is guided theoretically.
The expression can be obtained by simplifying it with the substitution value: The functional image of Q c changing with the duty cycle during the entire cycle was given as shown in the following figure (Fig. 6):  It is easily found that the value of Q c over the entire range of the duty cycle variation is about 0.01. In the reference [10], it is proposed that the equivalent power-level transfer function can be written in the following form when Q c ≪ 0.5 and the calculation method of zero pole is given: The function relation between zero pole and duty cycle was derived, the curve of zero pole with duty cycle is drawn (Fig. 7). It is found that the of the high-frequency pole and the zero point of right plane decreases gradually during the input voltage from peak to zero, and the difference between the two frequency values is decreasing. The phase delay of the system is very large, and the phase margin is too small when the input voltage is close to zero, which can induce unstable phenomenon. The worst stability of the system must be compensated so that the whole duty cycle can meet the requirements of frequency domain response.
It can be calculated that f p1 = 1.5 Hz, f p2 = 8.5 kH, f z = 80 Hz, G c0 = 11 when the input voltage is close to zero. So the outer loop voltage should be designed to offset the right half plane zero point, a single pole compensation network is designed: The open loop transfer function of the circuit is described as: Phase margin Then, the location of the crossing frequency need to be determined, in order to ensure the stability of the system, the following two conditions need to be satisfied when f = f c : Finally, the crossing frequency f c and the gain K V can be calculated as f c = 35 Hz, K V = 2.12. The compensated system transfer function is simulated by Mathcad software. The simulation results are as follows: Measuring the Bode diagram, the phase margin is 46° and the amplitude gain is equal to 1 at the crossing frequency. It meets the frequency response requirement, because the duty cycle is 0.95, which is the time of maximum phase delay of the system. Therefore, the response bandwidth is lost. So the other values of duty cycle are verified, the amplitude margin, gain and frequency response bandwidth are greatly improved, so the voltage outer loop compensation design can meet the requirements of frequency response (Fig. 8).

Simulation verification
In order to verify the stability of the globally dynamic compensation theory under the voltage outer loop compensation, a simulation circuit is built in Matlab software. The following are the simulation results: It is found that the zero current dead zone is eliminated and the power factor is improved under globally dynamic compensation