Subthreshold CMOS voltage reference circuit with body bias compensation for process variation

H. Luo; Y. Han; R.C.C. Cheung; G. Liang; D. Zhu

Subthreshold CMOS voltage reference circuit with body bias compensation for process variation

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Subthreshold CMOS voltage reference circuit with body bias compensation for process variation

Author(s): H. Luo ; Y. Han ; R.C.C. Cheung ; G. Liang ; D. Zhu
DOI: 10.1049/iet-cds.2011.0170

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Author(s): H. Luo ¹ ; Y. Han ¹ ; R.C.C. Cheung ² ; G. Liang ¹ ; D. Zhu ¹
- Affiliations: 1: Department of ISEE, Zhejiang University, Hangzhou, People's Republic of China
  2: Department of EE, City University of Hong Kong, Hong Kong, People's Republic of China
Source: Volume 6, Issue 3, May 2012, p. 198 – 203
DOI: 10.1049/iet-cds.2011.0170 , Print ISSN 1751-858X, Online ISSN 1751-8598

Published

This study presents a subthreshold complementary metal oxide semiconductor (CMOS) voltage reference circuit that adopts dynamical body bias to compensate the process-related reference voltage fluctuation. The proposed circuit generates a mean reference voltage of 0.781 V at 1.2 V supply and 27°C, reduces the standard deviation (σ) of the reference voltage from 11 mV to only 3 mV, and meanwhile improves the power supply rejection ratio from −30.7 to −51.4 dB. The average temperature coefficient measured from 0 to 100°C is 48 ppm/°C, and the line regulation is 0.34%/V in a supply voltage ranging from 1.2 to 2.3 V. The maximum supply current is 8.1 µA at 1.2 V supply and 100°C, and the chip area is 0.0533 mm² in 0.13-µm CMOS technology.

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Subthreshold CMOS voltage reference circuit with body bias compensation for process variation

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