Prevention of the current transformer saturation by using negative resistance

In the power grid, various conditions may occur that saturate the core of a current transformer. Saturation of the protection core of the current transformers can cause a malfunction in the protection relays. To prevent malfunction of the protection relays caused by the current transformer saturation, software and hardware methods can be used. In the software method changes in the protection relay algorithm are used. In the hardware method special devices are used. A new hardware method is presented here, which uses compensation to prevent the occurrence of current transformer saturation. In the proposed method, compensation is done by controlling an applied voltage to the current transformer secondary terminals using negative resistance. The proposed method, despite its simplicity and cost-effectiveness, has good performance in preventing saturation in various conditions. The high reliability in terms of the risk of secondary open circuit and its application in various saturation conditions, even in the case of severe saturation are the main advantages of the proposed method. Also, the proposed method does not produce distortion in the transformation of high-order harmonics by the current transformer. To verify the effectiveness of the proposed method, prototype design and construction have been performed. The simulation and experimental results of laboratory tests have been presented and analysed.


INTRODUCTION
The current transformer (CT) in the power grid is used for measuring the current flow and comprises two measuring and protection magnetic cores [1,2]. In a high-voltage grid, CTs may have several cores of measurement type and several cores of protective type [3]. The measurement core sends the current samples to the measuring equipment such as counters, meters, and transducers. The protection core sends the current samples to the protection relays and event/fault recorder [4]. Some conditions such as over-current, high current fault with decaying DC, inrush current etc. may occur in the power grid, and cause one or both protection and measurement cores to be saturated [5,6]. Saturation of the CT protection core can cause malfunction of the protection relays [7,8]. when saturation occurs in the CT protection core, the protection relays can detect it and block some of the relay functions that may cause malfunctioning. This method can only be implemented when the special types of digital relays are used for protection purposes. The software solutions are easy to implement due to the lack of need for circuitry changes [7,9,10]. The second type of solutions which are called hardware solutions are based on compensation or demagnetisation of the CT cores. In these methods, a suitable device must be added to the CT secondary circuit to prevent the CT cores from saturation. The hardware solutions increase the risk of the secondary opening circuit because of adding a device in series to the CT secondary circuit. Unlike software solutions that only detect saturation, hardware solutions prevent the CT cores from saturation. Implementing the hardware solutions does not need any special digital protection relays [6,11,12]. Some of the hardware solutions use demagnetisation methods to mitigate the residual flux. These methods operate when the CT primary circuit is open and FIGURE 1 Compensation method using secondary terminal voltage controlling can be used in the auto-reclosing scheme or after the CT testing procedure [13,14]. Some other hardware solutions use compensation methods to prevent saturation when a high current flows through the CT primary. These methods can be used in the case of over-current in the CT primary or presence of decaying DC component [12,15].
The compensation methods operate by controlling the voltage of the CT secondary terminal [13]. In these methods, the voltage of the secondary terminal is controlled in such a way that the voltage drop caused by the CT burden on the secondary terminals can be reduced by using a suitable compensator as shown in Figure 1.
According to the voltage polarity shown in Figure 1, the CT secondary voltage can be obtained by (1) and the CT flux will be in the form of (2) where ∅ 0 is the remnant flux, V tsec is the secondary terminal voltage, V Burden is the CT burden voltage drop, V comp is the voltage applied for compensating, and N sec is the turn number of the secondary CT winding. Substituting (1) into (2), (3) is obtained According to (3), if the V comp is properly controlled, the CT core flux can be controlled so that the core is not saturated. However, it should be noted that V comp is controlled and modified in such a way that it does not cause harmonic distortion in the secondary current and does not cause problems in transforming high-order harmonics in CT [16,17]. In the existing compensation methods, V comp is produced in three ways: (A) using negative voltage feedback, (B) using switching resistance, or (C) using controlled voltage source.
In method A, the negative voltage is obtained from a compensator transformer which is located on the secondary side of CT and acts as the negative feedback to oppose the CT excitation voltage. Using method A is simple and highly reliable, but due to the creation of a parallel path in the secondary circuit, an error in the measured current is made if the burden changes [18]. So any change in the CT burden makes this method useless. In method B, a switched resistor is placed in series in the secondary circuit. The value of this resistor changes in part of a current cycle. In this method, the performance is high, but the complexity of the control algorithm and the existence of switching devices increase the failure possibility and reduce reliability [12,17]. In method C, a controlled voltage source is used in the secondary circuit which controls the CT secondary terminal voltage. Method C, like method B, is highly accurate and can be used in severe saturation, but in addition to the disadvantages of method B, it interferes with the transformation of high-order harmonics [15].
In this research, a compensation method for controlling the voltage of the CT secondary terminal is proposed. This method is based on the negative resistance technique and without the need for controllers and switching devices. The use of this technique to compensate the CT saturation is unprecedented. The proposed method removes the mentioned limitations of previous compensation methods. The high reliability in terms of the risk of secondary open circuit and its application in various saturation conditions, even in the case of severe saturation are the main advantages of the proposed method. This method also does not distort the measurement of high-order harmonics because of the lack of switching devices. Applying the proposed method reduces the total burden on the CT secondary. As a result, the total voltage drop on the CT secondary terminal decreases. The proposed compensator does not use processor and made with passive devices and simple integrated circuit (IC). So, the circuit topology in this method is reliable duo to the circuitry simplicity. The high voltage CT price and financial loss caused by the outage and caused by undistributed energy that may occur due to the CT saturation is very high CT saturation. The cost of the proposed compensator and its installation is negligible compared to them.
The rest of this paper is presented in four sections. Section 2 contains the principles of the proposed compensation method using negative resistance. Section 3 includes the results of the simulations performed and their analysis. Section 4 includes the details of the design and construction of the prototype. Also, the experimental results of the proposed method are presented in this section, and Section 5 includes the conclusion.

PRINCIPLE OF THE NEGATIVE RESISTANCE COMPENSATION
In the negative resistance compensation principle, which the proposed method here, is based on this principle, the total burden of the CT secondary circuit is reduced by adding a negative resistance. Reducing the resistance in the secondary circuit reduces the voltage drop across the CT secondary terminal. According to (3), this decrease in voltage will reduce the flux in the core and prevent saturation. The circuit topology proposed in this research to implement this method is shown in Figure 2.
The section specified with the dashed line in Figure 2 shows the proposed circuit topology to create negative resistance in the CT secondary circuit. This topology uses a power amplifier and an auxiliary transformer. As can be seen in Figure 2, the proposed set is placed in series in the CT secondary circuit.
According to Figure 3, by analysing the circuit topology, (4)-(6) are obtained [19] The values of resistors R 1 , R 2, and R 3 in (4)-(6) are determined in the design procedure. The R ' in resistor has a negative value, dependent on R 1 to R 3 . The negative resistance shown in Figure 3 is acting as a negative load which injects energy into circuit in contrast to an ordinary load that consumes energy from it. This is achieved by controlling the voltage V nr according to current I ' sec as shown in Figure 3 and (5). In the proposed circuit topology, in addition to the negative resistance unit shown in Figure 3, an Aux. Trans. is also used. This transformer is used for two purposes: (A) reducing the output current of the power amplifier (I o ) and (B) preventing the secondary path opening circuit if any of the circuit elements fail. Therefore, by considering the Aux. Trans. in the proposed topology, (7)-(9) are obtained: In (7)- (9), I sec is the CT secondary current, n 1, and n 2 are the turn numbers of primary and secondary windings of the Aux. Trans., V comp is the compensation voltage, and Z aux is the impedance of the Aux. Trans. which in comparison with R ' in is negligible. The Aux. Trans. must have the magnetic core without air gaps. So, if any of the circuit elements on the secondary side of the Aux. Trans. fail and consequently I ' sec drop to zero, the magnetic core will be saturated and as a result, the secondary current, I sec, will not be zero and the CT secondary circuit will not open [20]. The material and dimensions of the core and the primary and secondary winding turn numbers should be selected according to (10) and (11) so that Z aux is very low and negligible at all frequencies: where R winding is the Aux. Trans. winding resistance referred to the primary, L is the Aux. Trans. inductance, ω is the angular frequency, n is the primary turn number of the Aux. Trans., A is the core cross-sectional area of the Aux. Trans., l is the average length of the core for the Aux. Trans., μ 0 is the vacuum permeability coefficient, and μ r is the relative permeability coefficient of the Aux. Trans. magnetic core. Equations (4)-(9) are obtained considering ideal power amplifier. In practice, the parameters offset current and bias current is very low compared to I ' sec . So these parameters are neglected in (4)- (9). The required slew rate for the power amplifier in the proposed method is less than 0.02 V/μs according to the circuit topology shown in Figure 2. This parameter for power amplifier is in range of several volts per microseconds. So, this is not a limitation in the proposed method.

SIMULATION OF NEGATIVE RESISTANCE COMPENSATION METHOD
To evaluate the efficacy of the proposed method, two different cases have been simulated using Comsol and Matlab software. In Comsol, the magnetic behaviour of a steel-cobalt 2VP core, commonly used as the CT core, was simulated. So, magne- tizing curve coordinates in clockwise and counterclockwise are obtained and used in Matlab simulation. In the first case, the CT saturation caused by a pure sinusoidal high current is simulated, and in the second case, the saturation caused by a decaying DC component is simulated, and the efficacy of the proposed method is investigated in both cases. Table 1 shows the circuitry parameter values of the proposed topology and Table 2 shows the parameters of the CT used in the simulation. The simulation results are shown in Figures 4-6. According to (7), the value of R in will be 4 Ω. Figure 4 shows the simulation results for a case in which at first the rated current is injected into the CT primary. After 40 ms, a fault is introduced in the simulation that increases the amplitude of the primary current up to eight times of the rated current. Figure 4(a) shows the CT secondary current for the two modes, without compensation and with compensation by the proposed method. Figure 4(b) shows the flux density in the CT core. It can be seen that without compensation, the core enters saturation from 43 ms onwards, and as a result, according to Figure 4(a), the secondary current is distorted. However, if the compensation is done by the proposed method, the flux will not be saturated and the secondary current will not distort. In the second case, the simulation was performed in the presence of a decaying DC value. The simulation parameters of the CT are as shown in Table 2. In this case, the amplitudes of the sinusoidal current and the decaying DC current injected into the CT primary are 5 per unit and 3 per unit, respectively. Considering L/R ratio in the CT primary circuit, the decaying DC time constant is 85 ms. The simulation results are shown in Figure 5. In Figure 5(a), the CT secondary current are compared for the two modes, without compensation and with compensation by the proposed method. It can be seen that in the case of uncompensated, the secondary current will be distorted from 27 ms onwards. But if compensation is done in the proposed way, the secondary current waveform will not be distorted. According to Figure 5(b), in the case of uncompensated, the core will be saturated in some of the time intervals, but if the compensation is done, the flux will not be saturated. Figure 5(c) shows the output current of the power amplifier (I o ).
To verify the reliability of the proposed method in terms of the secondary opening circuit, a condition has been simulated in which the current of the secondary side of the Aux. Trans. I ' sec is brought to zero during normal CT operation at rated current. Figure 6 shows the simulation results for the case of an open circuit on the secondary side of the Aux. Trans. which may occur due to circuit elements failure in the proposed topology. According to Figure 6(a) and (b), if the Aux. Trans. secondary current drop to zero, the core of the Aux. Trans. will saturate. Its magnetic reluctance will increase and the Aux. Trans. inductance seen from the CT secondary circuit will decrease to a negligible value. So, the CT secondary circuit will not open. But in this situation, the CT secondary will be distorted in both positive and negative half-cycles, as shown in Figure 6(a).

EXPERIMENTAL RESULTS
To verify the effectiveness of the proposed compensation method in practical conditions, a prototype device was designed and constructed. The elements of this device and the results of the laboratory tests are presented in this section. Figure 7 shows the prototype schematic diagram. In this prototype device, a module including a power amplifier for building the negative resistor, an auxiliary transformer, current and voltage sensors to sample the test results, and a storage module are used to capture and store the test results.
Laboratory tests were performed on a 20 kV CT. Table 3 shows the specifications of the CT under test. To examine the operation of the proposed method in preventing CT saturation, tests were performed in two cases: (A) pure sinusoidal high current and (B) current with decaying DC component.

Pure sinusoidal high current
In this test, due to the flow of pure sinusoidal current with large amplitude in the CT primary, the core saturates and the effect  Figure 8 for this test.
To perform this test, a current has been injected to the CT primary by the PRP-2000 device and its extension module. To increase the current on the primary side of the CT, the current injection cable has been twisted in five rings. In this way, the primary CT current will increase five times. The test was performed for two cases. In the first case, no compensation was applied, and in the second case, the prototype compensation method was placed in the secondary circuit to prevent saturation. The results of these tests are shown comparatively in Figure 9.
At first, pure sinusoidal current of 800 A root mean square (RMS) is injected into the primary cable by the current injection device. So the primary current of the CT is 4000 A (RMS) or 8 per unit. Figure 9(a) and (b) shows the primary and secondary currents for uncompensated mode and compensated with the proposed method, respectively. It can be seen that in the case of uncompensated, the core is saturated twice in each cycle, and as a result, the secondary current is distorted, but in the case of compensated, saturation does not occur. Figure 9(c) shows the output current of the power amplifier compared to the secondary current. This current is less than 5 A during the test.

Current with decaying DC component
To perform this test, the CPC-100 device [14] is used to inject current into the CT primary. A sinusoidal current of 2500 A (RMS), equivalent to 5 per unit, and a decaying DC component of 1500 A amplitude, equivalent to 3 per unit are injected into the CT primary. The time constant is 100 ms. The laboratory set-up for this test is shown in Figures 10 and 11. The test was also performed for two cases. In the first case, no compensation is applied, and in the second case, the prototype compensation device is placed in the secondary circuit to prevent saturation. The results of this test are shown comparatively in Figure 11.    Figure 11(a) shows the injected currents. Figure 11(b) compares the CT secondary current for the two modes, with and without compensation. It can be seen that without compensation, the core is saturated from 30 ms onwards and the secondary current is distorted. But with compensation using the proposed method, the secondary current will not distort. Figure 11(c) shows the output current of the power amplifier and can be compared with the CT secondary current. This current is less than 5 A during the test, and its maximum occurs at the start time before the DC value starts decaying.
Measurement of high-frequency currents by CT is very important for the performance of some protection relays. For example, some protection relays use the second-and fifth-order harmonics to detect inrush current and over-flux, respectively. Therefore, it is important that CT properly transforms these harmonics. In these cases, it is important that the equipment that are placed into the CT secondary side, including saturation compensator, do not cause distortion. To investigate harmonic distortion for the proposed compensator, a harmonic study is performed and the results are shown in Table 4. The results presented in this table are extracted from the eighth cycle of test results shown in Figure 11(b). According to Table 4, the harmonic distortion in the secondary current for all frequencies is less than 1% which is acceptable.

CONCLUSION
In this research, a hardware method was proposed which compensates the CT saturation by controlling the voltage of the secondary CT terminal by using a negative resistance, which is made by a power amplifier and an auxiliary transformer.
To evaluate the performance of the proposed method, simulation results, and practical results are presented here. The advantages of the proposed method include usability in high current and DC current conditions, high reliability, simple structure, and lack of harmonic distortion.