Novel pilot protection scheme for line-commutated converter high voltage direct current transmission lines based on behaviour of characteristic harmonic impedances

Transient behaviour of high-voltage direct current transmission lines under direct current faults can be easily affected by many factors, namely, fault location, fault resistance and transmission line length. In order to design a suitable protective scheme, the impact of these factors should be thoroughly investigated. An impedance-based analysis is more suitable in evaluating high-voltage direct current system behaviour during direct current line faults, and consequently, in comparison to similar harmonic current or voltage-based schemes, a characteristic harmonic impedance-based protection is more capable in fault detection. Therefore, this paper presents a novel pilot protection method for line-commutated converter based high-voltage direct current transmission lines, which relies on continuous monitoring of characteristic harmonic impedances. The proposed method can accurately calculate location of faults along the line, and estimate additional valuable information, such as fault resistance. The validity of the proposed method is evaluated by a wide range of fault scenarios using the CIGRE high-voltage direct current benchmark model, simulated in PSCAD/EMTDC and codes written in MATLAB software environ-ments. It will be shown that the proposed protection method sounds promising, and can serve as an excellent backup option in the case of primary protection malfunction.


INTRODUCTION
Line-commutated converter (LCC) high-voltage direct current (HVDC) transmission systems are the popular type of bulk power transmission networks, which have distinct advantages such as the ability of transmission in long distances, low power losses, enhanced flexibility in control and asynchronous interconnection [1]. Due to the huge amount of energy being transferred by the long transmission lines, reliability and security of the system are of utmost importance. Presently, travelling-wave and voltage derivative protection methods are widely employed as the main HVDC protection schemes [2], in which the rate of change of direct current (DC) voltage and current are utilised as fault detection criteria. Although these methods can be quite fast in identifying DC line faults, they have the drawback of being highly sensitive to fault resistance [2]. DC backup protections are essential in case of primary protection failure, there-

Literature review
The state-of-the-art research works of HVDC protection schemes can be categorised as (1) single-ended protection schemes and (2) pilot protection schemes. For single-ended protection schemes, travelling wave based protections are widely used as the primary protection [6,7], and wavelet analysis is suggested as a powerful tool for signal processing in these solutions [8]. However, these travelling wave based methods suffer from innate problems such as lack of mathematical tools and need for high level of expertise for wave-front identification [9]. High-resistance faults and disturbances can further limit their practicality because identification of wave-front of the travelling waves will become harder [10]. Recently, boundary protection has been introduced as a viable primary protective solution for fast fault detection [11][12][13][14][15][16]. The fundamental principle of these methods is based on the filtering capability of DC filters and smoothing reactors in preventing high-frequency harmonic currents from entering the DC line. However, high sampling frequency, required for some of these methods, is well above practical limitations in some projects. Distance protection for HVDC transmission lines has originally been proposed in [17] with the aim to accurately estimate the fault location. More prominent methods by employing the frequency-dependent line parameters were proposed afterwards, which improved the overall accuracy of fault detection, especially for the remote-end fault conditions [18,19]. However, these solutions still have difficulties in identifying the faults close to the end of the line [18]. For pilot protection schemes, various backup methods have been proposed, focussing on detecting internal fault by measuring transient energy [20] and reactive power [21] during fault incidents. However, performance of these methods is heavily affected by fault resistance. Backup protection based on hybrid travelling-wave/differential method [22] has also been proposed, which aims to improve speed of fault detection of the traditional current differential protection scheme. However, since this method employs travelling-wave principle, it has vulnerability to high-resistance faults and disturbances. Other prominent pilot protections based on characteristic of the fault current [23] and eliminating the impact of distributed capacitive current [24] have been proposed. However, the study in [23] is only accurate during the initial moments of fault, and after that, its reliability is not guaranteed [25].

Contribution of our work
In order to protect HVDC transmission lines, it is imperative to propose a protective method that is robust in identifying all internal faults. In this regard, various distance and boundary protective methods, as mentioned in the literature review, have been proposed. The boundary methods rely on the assumption that internal faults generally produce more characteristic harmonic currents than external faults, a criterion which can be utilised to identify internal faults [11,12]. However, these methods are unable to detect some internal faults because they fail to consider the periodic behaviour of characteristic harmonic input impedances. In other words, based on fault location, fault resistance and line length, internal and external faults result in characteristic harmonic impedance variations, which inevitably result in different characteristic harmonic voltages and currents. Therefore, there are internal faults that produce lower harmonic content than some external faults. These incidents will results in mal-operation of the boundary protection methods that only rely on characteristic harmonic voltages and currents to detect the faults. In order to tackle this problem, an impedance-based protective solution is required so that the FIGURE 1 Schematic diagram of the modified CIGRE benchmark system periodic nature of the input impedances can be investigated. Therefore, a novel pilot protection method based on behaviour of characteristic harmonic input impedances is proposed, which is able to fully explain the periodic behaviour of characteristic harmonic impedances under various fault scenarios. By properly investigating the impact of fault location, fault resistance and line length on the input impedances, the proposed protection method is able to operate more reliably than similar boundary schemes. On the other hand, distance protection methods also lack these investigations; hence, the proposed method is also more reliable than those distance methods. The proposed protection method employs a three-part algorithm, with which it is able to accurately reveal the fault location, and even estimate the fault resistance. The rest of the paper is organised as follows. A typical monopolar HVDC system and supporting fundamental impedance formulations are presented in Section 2. The required impedance relations for the proposed protection are presented in Section 3. Section 4 presents the protective algorithm, and Section 5 presents its performance in the case of various fault locations, fault resistances and line lengths. The results of the simulation study are presented in Section 6, and comparison to similar studies and discussion is presented in Section 7. Finally, Section 8 concludes this paper.

TYPICAL MONOPOLAR HVDC SYSTEM AND FUNDAMENTAL RELATIONS
In this section, the structure of the monopolar HVDC test system and fundamental relations, presenting the basis of the protective method, will be introduced. Figure 1 shows the schematic diagram of the monopolar CIGRE benchmark, first presented in [26]. The CIGRE benchmark system is a monopolar 500 kV HVDC link transferring 1000 MW of electrical power between two 12-pulse current source converters. The transmission line is modelled by the frequency-dependent line parameters and the DC filters are used for 12th, 24th and 36th harmonic currents filtering. This paper proposes the protection method based on the input impedance associated with characteristic harmonics, calculated from both sides of the transmission line, as depicted in Figure 1, by Z in ⋅V r , I r , V i and I i are the measurement points of the DC voltages and currents for calculating the input impedance, Z in , and the output impedance, Z out . The DC side of the system, presented in Figure 2, includes V rec and V inv , The equivalent network of the DC side of the system for studying internal and external fault conditions which represent the equivalent harmonic voltage sources of the rectifier and inverter, respectively. Z rec and Z inv are also their equivalent impedances [27].
Considering the frequency-dependent line parameters, the input impedance can be expressed in Laplace domain with where V r (s) and I r (s) are the measured voltage and current at the rectifier side of the line. For an assumed transmission line of length l , characterised with propagation constant, (s) and characteristic impedance, Z 0 (s), that feeds a load, Z L , the input impedance, Z in (s), can be obtained from the Telegrapher's equations [28]: The load impedance can be presented by (5), where Z sm , Z inv and Z fil are the impedances of the smoothing reactor, inverter and DC filter, respectively:

IMPEDANCE RELATIONS REQUIRED FOR THE PROPOSED PROTECTION METHOD
Generally, harmonic voltages and currents exist in power systems, and they have been used for various protective schemes in AC micro-grids and other power systems [29][30][31]. Harmonics are also part of HVDC voltage and current [1]. Characteristic harmonic voltages are the direct result of converters operation, superimposed on the DC voltage. As a result, characteristic harmonic currents of the same order also flow through the system. To eliminate these characteristic harmonic currents, DC filters are installed at both terminals of the line, which combined with smoothing reactors act as the line boundary [11,12]. Transient characteristic harmonic currents exist under normal and different fault conditions in HVDC system. As an example for internal faults, the characteristic harmonic fault currents are shown by I fr and I fi in Figure 3, which can be picked up by the measurement units installed on both sides of the line. Due to the structure of the HVDC system, DC filters and presence of these characteristic harmonics, which act differently during normal or various faulted conditions, they have been used for the purpose of fault detection [11,12]. Therefore, this paper also uses these harmonics in the novel pilot protective method to monitor the behaviour of input and output impedances of 12th (600 Hz) and 24th (1200 Hz) harmonics, using accurate impedance modelling of the line, DC filters and other related components.
Generally, calculation of the input and output impedances can be performed in two directions: 1. forward direction, from rectifier to inverter; 2. backward direction, from inverter to rectifier.
Input and output impedances can be evaluated in each direction, independently. It should be highlighted that hereafter, the entire input and output impedances (Z in and Z out ), calculated in the forward and backward directions, are calculated at each characteristic harmonic frequency (12th or 24th), separately. Figure 2 shows general form of the DC side of the system, which can be reconstructed for any harmonic order. For example, for 12th and 24th harmonics, the input impedances can be presented by (6) and (7), respectively:

Forward direction
where V r,12 (s), V r,24 (s) I r,12 (s) and I r,24 (s) can be easily obtained from the discrete Fourier transform (DFT), applied to the measured DC voltage and current (V r and I r ), captured from the rectifier side of the line, as shown in Figures 1 and 2. As a result of fault occurrence, either internal or external, the circuit of the DC side changes. In the case of external faults such as f 2 , where x = 0, the input impedance can be expressed as follows: Z in and Z out in (8) and (9) should be obtained according to the forward direction presented in Figure 2. Hereafter, (8) and (9) are referred to as the external-forward set (EFS).
For an internal fault, such as f 1 , happening at x from end of the line, the input impedance will be Hereafter, (10)(11)(12)(13) are referred to as the internal-forward set (IFS). Fault location, x'; fault resistance, Z f and inverter impedance, Z inv , are the unknown variables in (8)(9)(10)(11)(12)(13), while the remaining variables are either system parameters or measured quantities. According to (9) and (11), if fault resistance has very small value, for external faults, Z L ≈ Z fil ||Z sm , and for internal faults, Z L ≈ Z f 1 . Therefore, Z inv could be eliminated from all equations. However, if the fault resistance has a relatively high value, another unknown variable (Z inv ), will be introduced to (8)(9)(10)(11)(12)(13), which is generally a complex value to model [32]. Therefore, for eliminating Z inv from the equations, other measurements on the inverter side are mandatory. Looking back at Figure 2, using measurement units of V i and I i , the output impedance, Z out , can be calculated according to (14) and (15) in a similar procedure performed for Z in . When Z out is obtained, according to (9) and (13), Z L and Z L2 , for external and internal faults can also be obtained, respectively, and thus, Z inv is eliminated.
Therefore, according to EFS and IFS, the remaining variables which should be calculated by the protective algorithm in order to detect the internal faults are fault location, x, and fault resistance, Z f .

Backward direction
Similar to the aforementioned procedure of forward direction, a collection of equations can be defined in the backward direction ( Figure 2). The set of relations for detecting external faults at the rectifier side, such as f 3 , will be (hereafter referred to as the external-backward set (EBS)) Compared to (8) and (9), only the values of Z in and Z out are replaced with Z in2 and Z out 2 , respectively.
Similarly, the set of relations for the internal faults will be (hereafter referred to as the internal-backward set (IBS))

PROPOSED PROTECTION METHOD
The method proposed here is a pilot protection scheme, which is based on the calculation of input and output impedances, defined in the previous section. Based on location of faults, only specific sets of equations can reveal accurate fault location. If the fault is internal, location of the fault can be calculated by both IFS ((10-13)) and IBS ((18-21)). However, in the case of external faults, only one set of the equations will be helpful.
For the external faults such as f 2 , the fault location can only be obtained from EFS ((8-9)), and for the external faults such as f 3 , only EBS ((16-17)) can yield correct results. Therefore, if at least one of the IFS or IBS reveals a fault location using the corresponding measured input and output impedances, it means that an internal fault has happened on the line. Therefore, this paper can use IFS and/or IBS for designing the protective algorithm. It should be noted that the fault detection algorithm presented in this section is only designed employing IFS. For detecting internal faults using IBS or external faults, a very similar algorithm considering the corresponding measurements and equations can be also designed. Generally, the algorithm is designed to calculate the magnitude and phase angle of 12th and 24th harmonic impedances of the HVDC system, and compare them with the entire possible results which can be obtained from IFS for every possible fault location and fault resistance. Therefore, the protective algorithm has three major parts. The first part aims to obtain the magnitude and phase angle of the characteristic harmonic input impedances from the HVDC line. The second part is focused on producing the entire possible quantities of the magnitude  Figure 4, which can also be summarised in the following steps: Part 1: Step 1: The measurement units should continuously monitor the DC voltage and current, captured from the rectifier (V r and I r ), and inverter (V i and I i ) sides of the HVDC system. Step 2: By applying the DFT analysis, the voltage and current components of 12th and 24th harmonics (V r,12 , I r,12 , V i,12 , I i,12 , V r,24 , I r, 24 , V i, 24 and I i,24 ) should be calculated.
Step 3: Using (6), (7), (14) and (15), the input and output impedances of 12th and 24th harmonics will be obtained. The magnitude and phase angles of these two sets of impedances will be used to reveal the location of possible fault condition.

Part 2:
Step 1: To generate the data related to the magnitude and phase angle of each characteristic harmonics (12th and 24th) from IFS, all the given parameters, such as Z sm , Z 0 , Z fil , and l as well as Z out, 12 and Z out, 24 , are substituted in IFS. There are still two remaining unknown variables; fault location, x, and fault resistance, Z f . Step 2: To obtain the magnitude and phase angle of Z in, 12 and Z in, 24 , all possible values of fault location and fault resistance, in the range of 0-l km and 1-500 Ω, should also be substituted in IFS, respectively. For each fault location and fault resistance, a set of four values, representing the magnitude and phase angle of 12th and 24th harmonic impedances, is obtained. It is important to highlight that in this study, the entire process of part 2 of the algorithm is carried out in offline mode, by assuming that Z out, 12 and Z out,24 are also unknown variables, similar to fault location, x, and fault resistance, Z f . By doing that, part 2 of the algorithm presents a lookup table of input impedances for various fault locations, fault resistances and output impedances.

Part 3
Step 1: The algorithm should compare the results of the input impedances from part 1 with the collection of the produced data from part 2. The closest match, corresponding to a fault location and fault resistance, reveals the location and resistance of the fault.
Step 2: Finally, if fault location is within the line length, x < l , the protection system should issue a trip signal, otherwise, the fault can be external, and there is no need for protective actions.

PERFORMANCE ANALYSIS OF THE PROPOSED PROTECTION METHOD
According to EFS and IFS, for an assumed transmission line of length l, the input and output impedances are affected by various factors such as fault location, x, fault resistance, Z f and line length, l. In order to investigate the impact of these factors on characteristic harmonic impedances, the CIGRE monopolar HVDC test system is simulated in this section. The line length is assumed to be 1200 km, and its tower structure is as shown in Figure A1. The structure and parameters of the DC filters are also presented in Figure A2 [12].

5.1
Impact of fault location on characteristic harmonic impedances Figure 5 presents the magnitude and phase angle of the input impedances of 12th (Z in, 12 ) and 24th (Z in, 24 ) harmonics, which are directly acquired from part 2 of the algorithm for different fault locations. The horizontal lines in Figure 5 are the magnitude and phase angle of 12th harmonic input impedance obtained from part 1 of the algorithm for a fault at 400 km from the end of the line with resistance of 1 Ω. Based on part 3 of the algorithm, the magnitude and phase angle of 12th harmonic impedance (horizontal lines in Figure 5) should be compared with the entire 12th harmonic input impedances, acquired from part 2 of the algorithm (waveforms in Figure 5). The closest match will reveal the fault location. It can be clearly seen that the magnitudes and phase angles, acquired from part 2 of the algorithm, periodically change with respect to fault location. Therefore, according to Figure 5, in search for identifying the fault location, multiple locations will be obtained, meaning that the actual fault location cannot be revealed. To illustrate, assume the internal fault that has happened at 400 km from the end of the line in the simulated CIGRE HVDC test system. The measured value of 12th harmonic impedance (|Z in,12 |∠ in,12 ) from the HVDC test system is 590.8 ∠−21.56 • , which is presented by the horizontal axis in Figure 5. It can be observed that by solely relying on either of the magnitude or phase angle, there will be multiple fault locations as indicated in Figure 5. However, when both values are considered concurrently, the only possible fault location will be 400 km. Therefore, in this case, by only using 12th harmonic impedance, the proposed method can detect the fault. However, to ensure that the protective algorithm is reliable and able to detect all internal fault cases, the results acquired from using 24th harmonic impedance must also be considered. Similar results can also be obtained from the procedure of fault detection in the backward direction, which are presented in Figure 6. The waveforms of Figure 6 are obtained from IBS, and the fault location is detected at 800 km from the beginning of the line, which is similar to the fault location result of 400 km, calculated in the forward direction. The periodic nature of the input and output impedances of characteristic harmonics during the internal faults, which are presented in Figures 5 and 6, is very important. As shown in these figures, based on the location of the faults, the magnitude and phase angle of the measured input and output impedances can change drastically. This basically means that different internal DC faults at different locations will produce different harmonic content. According to Figure 5, the produced harmonic current content, measured at both sides of the system, in the case of a fault at 400 km, will be quite different from a fault at, for example, 1000 km. This is because of the big differences in the input and output impedances of these two cases, which will inevitably affect the characteristic harmonic currents, measured at the rectifier and inverter sides of the system.
As another example in the case of the fault at 400 km, the input impedance (590.8 ∠−21.56 • ), according to Figure 5, is larger than the output impedance (224.4 ∠−67.5 • ), according to Figure 6. Therefore, majority of 12th harmonic current flows through the inverter side of the line, and lower harmonic current is observed at the rectifier side. This is important because there might be some locations along the line, such as the one given in the above example, that if a fault happens there, the produced harmonic current content picked up at the rectifier side, is lower than that of some external faults. This can consequently result in the fail-to-trip operation of those one-end boundary protection methods that only rely on the harmonic current content of the system measured at the rectifier side and the assumption that all internal faults produce higher harmonic currents than the external faults. This matter shows the necessity of investigating the impact of fault location on protective algorithms and the superiority of the proposed protection method of this paper in distinguishing the internal faults. An example of this issue will be discussed in Section 7.

Impact of line length on characteristic harmonic impedances
To investigate the impact of line length, various external faults with resistance of 1 Ω are simulated at the inverter side of lines with different lengths, ranging from 800 to 1400 km. Based on EFS, the input impedances of 12th and 24th harmonics under external faults are dependent on length of the transmission line, l . As shown in Figure 7, when line length changes, periodic behaviours are observed, and the level of variations is quite high. For example, the input impedance of an external 1 − Ω fault in a 950 km line is 1076 ∠−3.1 • , while that of a 1200 km line is 543.4 ∠30.2 • . If a designed one-end boundary protection can distinguish the internal faults in the 950 km line, it may have difficulties in the 1200 km line. This is because there are considerable differences in the input impedances, which lead to considerable variations of the harmonic currents measured at the rectifier side of the line. To illustrate, based on the boundary protection criterion, generally, internal faults produce more harmonic currents than external faults, a principle that is used for internal fault identification. In the 950 km case, the input impedance of the external fault is quite high, resulting in lower harmonic currents measured at the rectifier side. On the other hand, the input impedance of the external fault in the case of   1200 km line is lower and consequently, the measured harmonic current is higher. Therefore, detecting the internal faults in the 950 km line is easier than the 1200 km line. This means that some of the one-end distance or boundary protections, designed for an assumed line length, may not be suitable for other line lengths. Therefore, a general protective solution which can work reliably for all LCC-HVDC transmission lines is required. According to IFS, for an assumed fault location and fault resistance, the input impedance can periodically change with variations of line length. Therefore, similar to Figure 7, periodic behaviour is observed in the case of internal faults when line length changes.

5.3
Impact of fault resistance on characteristic harmonic impedances Figure 8 shows the results of magnitude and phase angle of frequency response of the input impedance for a fault location at 600 km of the 1200 km transmission line considering various fault resistances (Z f ). It can be seen that fault resistance can easily affect the input impedances. The main reason is the effect of rectifier or inverter impedance. According to (11), for small values of fault resistance, Z L is almost equal to fault resistance, Z f 1 , since the effect of Z x can be ignored. In this case, a one-end distance protection can reliably detect the internal faults. This is because according to (10), there are only two variables namely, x and Z f 1 , which are real values, and can be obtained using the protective algorithm of this paper. Therefore, there is no need to measure the value of Z out , and by applying the magnitude and phase angle of input impedance in (10), the fault location can be revealed. This means that the measurements of the rectifier side is sufficient for detecting the low-resistance internal faults. However, for high-resistance faults, the influence of Z x cannot be ignored, and consequently, the impact of Z inv on Z x will be substantial. Therefore, according to IFS, there are three variables such as x, Z f 1 and Z inv , and by only applying the magnitude and phase angle of the input impedance, the fault location cannot be obtained. To overcome this problem, other measurements such as V i and I i are necessary for calculating Z inv , as depicted in Figure 2. This is actually the reason why some of the one-end distance protections have difficulties in identifying the high-resistance or the remote-end fault conditions.

Generality of the proposed protection method
As explained in the previous subsections, fault location, fault resistance and line length are important factors, which obviously affect the voltage, current and impedance of the system during both internal and external faults. According to Figures 5-7, based on fault locations and line lengths, the characteristic harmonic input impedance of the system during internal and external faults is changing significantly. Therefore, in designing a general protective solution, it is imperative to consider these factors simultaneously. In other words, a robust HVDC protection scheme should be established based on the following two principles: Similar boundary protection studies, as mentioned in the introduction of the paper, do not fully consider and investigate the effect of fault location, fault resistance and line length on the performance of their methods. This is because the periodic behaviour of the input and output impedances of characteristic harmonics can only be revealed by the impedance-based evaluations presented here. Therefore, since these studies are designed only based on harmonic voltages and currents, they do not have the necessary tools for this purpose. Therefore, they are unable to fully represent the effect of fault location, fault resistance and line length on the transient behaviour of the system during DC line faults, and consequently, their protective methods may fail in some fault scenarios. On the other hand, the proposed method of this paper, being a solution based on characteristic harmonic impedances, can better investigate and explain the transient behaviour of system during DC line fault, thus, it is more capable in internal fault identification.

SIMULATION STUDY
Extensive studies are conducted considering various fault scenarios. The line length and fault resistance are in the range of 800-1200 km and 1-500 Ω, respectively. The input and output impedances of characteristic harmonics are directly captured from the modified CIGRE benchmark system simulated in EMTDC/PSCAD software, and then are fed into a special code written in MATLAB software for identifying the fault location and presenting an estimation of fault resistance.

Performance under faults with various locations and resistances
For the purpose of investigating the performance of the proposed protection method under various internal faults, numerous fault scenarios are simulated. In all cases, the faults are happening at 1.5 s, the sampling frequency of the DFT is 50 kHz and fault location is measured from end of the 1200 km line. Due to extent of the paper, only the results of some scenarios are presented in Tables 1 and 2. According to these tables, the faults occur at 2, 25, 200, 500, 795 and 1195 km from the end of the line with resistances of 1, 50 and 100 Ω. The data gathered in Table 1 is the resulted input (In) and output (Out) impedances of 12th and 24th harmonics (acquired from part 1 of the algorithm) for each fault scenario. Using the data provided in Table 1, the proposed algorithm is able to detect the faults by indicating their location. The fault location (Loc) results together with fault resistance (Res) estimations are gathered in Table 2. The protective algorithm produced these results the moment at which it was able to detect the faults. The accuracy of fault location results is 0.5 km.
To better illustrate the mechanism of the proposed algorithm, assume the case of internal fault at 500 km from the end of the line with resistance of 1 Ω. The input and output impedances of 12th harmonic, obtained from part 1 of the algorithm, are 220∠47.9 and 360∠−119.7, as marked in Table 1, respectively. To reveal the fault location, the proposed method explores the lookup table created in part 2 of the algorithm for quantities closest to these input and output impedances.
Since each impedance data of the look up table is allocated to a specific fault location and fault resistance, when the algorithm finds the closest match, the location of fault and its resistance will be automatically revealed. As discussed in Section 5, the input impedance of 12th harmonic is periodic, meaning that multiple fault locations will be found. Therefore, the protective algorithm process should be repeated using the 24th harmonic impedance. By analysing the fault location results of both characteristic harmonics simultaneously, it is observed that both of them indicate an internal fault at 500-500.5 km from end of the line with resistance in the range of 1-3 Ω, as marked in Table 2. Therefore, not only the internal fault is detected, but also its location and resistance are obtained. This process of fault detection is performed for the entire fault scenarios of Table 1. Instead of 24th harmonic impedance, the process can be performed in the backward direction, employing 12th or 24th harmonic impedances, which will also yield the same results.
To further describe the results, Figure 9 shows the per-unit values of the DC voltage and current from the rectifier side of the system for a simulated fault happening at 1.5 s and 500 km from the end of the 1200 km line with resistance of 100 Ω. It can be seen that the DC voltage will suddenly drop due to the fault occurrence, and the DC current will rise. When the HVDC current controller starts to react to the abnormal changes, the DC current will decrease immediately.
The magnitude and phase angle of 12th and 24th harmonic input impedances (Z in, 12 and Z in,24 ) together with the moment of fault detection (without considering the communication delay) are shown in Figure 10. The algorithm is able to detect the internal fault based on the measured input and output impedances, and issue a trip signal around three cycles after the fault occurrence. The trip signal can be used in different strategies of fault isolation [33]. Figure 11 shows simulation results

Performance under faults on lines with various lengths
To assess the performance of protective algorithm in detecting internal faults on lines with different lengths, various fault cases are simulated. In all cases, fault location and fault resistance are at 500 km from end of the line and 1 Ω, respectively. Some of the input and output impedances of characteristic harmonics that are used by the algorithm, and the resulted fault locations and resistances, are gathered in Table 3. The impedances are obtained from part 1 of the algorithm, and when they are used  for fault detection, the algorithm is able to detect the internal faults. Therefore, the input and output impedances are related to the moments at which the DC line faults are discovered. More results about the magnitude of 12th and 24th harmonic input impedances are also presented in Figure 12, which more clearly shows the periodic nature of the input impedances under internal faults on lines with different lengths. Overall, by reviewing the results of Tables 2 and 3, it can be concluded that the generality of the proposed protection method, as discussed in Section 5, is guaranteed. The protection method is able to reliably identify internal faults in various scenarios with high accuracy. In addition, the proposed method can also provide useful information about fault resistance, which can be useful in tuning protective relays. The proposed method remains completely reliable, and no mal-operation is observed.

External faults
Various external fault scenarios are simulated at both sides of the 1200 km line with resistance of 1-500 Ω. The protective algorithm performs well under the external faults, and does not detect any fault condition, meaning that the external faults are not confused as internal. On the other hand, if the logic of the algorithm is modified to search for fault locations using EFS and EBS in the part 2, which are suitable for detecting external Inverter side 0 km 0 km 0 km Rectifier side 1200 km 1200 km 1199.5-1200 km faults, these faults can be independently identified as external faults. Table 4 presents the performance of the modified protective algorithm in detecting the location of external faults. While accurate fault location can be revealed under external faults, an evaluation of fault resistance cannot be performed. For example, at the inverter side, this is due to the position

FIGURE 13
Magnitude and phase angle of 12th and 24th harmonic impedances in the case of a single line-to-ground AC system fault at the inverter side of inverter measurement units (as shown in Figure 2), which, according to (9), cannot be used for separating the values of Z inv and Z f 2 from Z out . Overall, Table 4 confirms the robustness of the proposed method in identifying the external faults. Note that the fault locations are measured from the end of the line.

AC system faults and commutation failure
To investigate the impact of AC system faults located at f 4 and f 5 in Figure 1, various fault conditions (symmetrical and unsymmetrical faults) with various fault resistances are simulated. During majority of the AC system faults at the inverter side, commutation failures for approximately multiple cycles of the fundamental frequency are observed. Therefore, this part of the simulation study, evaluate performance of the method, not only under AC system faults, but also during commutation failures. Due to the extent of the paper, only one example of AC system faults is presented here. Figure 13 shows the magnitude and phase angle of 12th and 24th harmonic input impedances, in the case of a single phase-to-ground AC system fault, happening at the inverter side of the line with resistance of 1 Ω, which also causes severe commutation failure. The line length is 1200 km and the fault period is 0.1 s. It can be seen that severe impedance fluctuations are observed during this AC system fault.
Based on the simulation studies, the input and output impedances have substantial fluctuations under different AC fault scenarios, and using the obtained data in the protective algorithm, no internal fault conditions are detected. Therefore, it is safe to conclude that AC system faults cannot jeopardise reliability of the proposed method.

Sensitivity to change of operation point
When the operating point of HVDC systems changes, transient voltage and current will be generated. It is important that the

FIGURE 14
Behaviour of the input impedances during step changes of the DC current proposed protection method stays reliable during these cases, and do not mistakenly issue a trip signal. Therefore, various changes in the operation point are simulated, and some results are presented in Table 5. These changes include step changes in DC voltage and current from 1 to 0.85 P.U. and from 1 to 1.15 P.U. The input and output impedances of characteristic harmonics presented in Table 5 are examples of the obtained data from part 1 of the algorithm after changing the operation point. During the whole process of operation point changes, the algorithm does not detect any internal fault, which means that the proposed protection method remains reliable during these conditions. Figure 14 shows behaviour of the input impedances of 12th and 24th harmonics during DC current step changes. The step changes happen around 1.5 and 2 s. 6.5 Sensitivity to sampling frequency Table 6 shows the influence of sampling frequency on accuracy of identifying the fault location in the case of an internal fault happening at 500 km from end of the 1200 km transmission line with resistance of 100 Ω. It can be seen that sampling frequency has negligible impact on the fault location results. However, the impact on estimating the fault resistance is somehow considerable in 2 and 5 KHz scenarios.

Comparison to distance protections
According to Tables 2 and 3, for the entire tested line lengths, fault conditions can reliably be detected at anywhere along the line; therefore, compared to some of the distance protections such as [18], which have deficiencies in detecting the far-end faults, the proposed method is robust. Compared to [19], which is a distance backup protection, the proposed method has the advantages of identifying the exact fault location and it does not rely on the operation of the DC filters.

Comparison to boundary protections
Some of the well-known boundary protection methods are those proposed in [11] and [12], which use the amplitude of 12th, 24th and 36th harmonic currents and 300-4800 Hz current of the DC line for fault identification. However, these criteria are not enough to detect all internal faults. This is because in these studies, it is assumed that, because of the boundary characteristic of DC filters and smoothing reactors, the produced characteristic harmonic currents under internal faults, measured at the rectifier side of the line, are more than those under external faults. Therefore, if characteristic harmonic currents are higher than a threshold, which is defined based on characteristic harmonic currents produced under external faults, internal faults can be detected. However, these studies fail to consider the periodic nature of the input and output impedances of characteristic harmonics, as discussed in section 5. Thus, there are internal faults that produce lower characteristic harmonic current than some external faults. In these cases, these boundary protections will fail to detect specific internal faults. For example, Figure 15 presents the magnitude of 12th  FIGURE 15 An example of internal fault condition, which is producing less 12th harmonic current compared to a similar external fault harmonic current during an internal, and an inverter-side external fault with resistance of 1 Ω. The internal fault location is 435 km from end of the line. During the course of internal fault, the measured output impedance of 12th harmonic, Z out,12 = 75.6∠ − 204.5 • , is much smaller than the input impedance of 12th harmonic, Z in,12 = 887∠11.1 • . Therefore, according to Figure 3, majority of the internal fault current will flow through the inverter side of the system (I i ), and only a small amount of the fault harmonic current is captured at the rectifier side (I r ). This can also be seen in Figure 15, where I i (24 A) is noticeably higher than I r (4.8 A). Moreover, 12th harmonic current during the internal fault (I r =4.8 A) is lower than that of the external fault (I r =9.5 A). This case becomes critical because this external fault with Z in,12 = 461∠17 • and I r =9.5 A is actually producing more harmonic current than the internal one with Z in,12 = 887∠11.1 • and I r =4.8 A. Therefore, a boundary protection, such as [11] and [12], which only relies on the harmonic current content, obtained at the rectifier side of the system, cannot distinguish some specific fault conditions such as this case.
In order to tackle this problem, an impedance-based protection is required to reveal the periodic behaviour of characteristic harmonic impedances and detect the fault location. This is exactly the main idea behind the proposed protection method of this paper. Since it relies on characteristic harmonic impedances, it is able to explain the behaviour of characteristic harmonic currents during internal and external faults, and by extracting the accurate location of faults, prevent the mal-operations that are observed in similar boundary protections. Figure 16 further proves the periodic behaviour by presenting 12th harmonic voltages and currents during internal faults at various fault locations. For example, the amplitude of 12th harmonic current of fault at 500 km from the end of the line is higher than those of faults at 600 and 400 km but lower than that of the fault at 300 km. Therefore, this assumption that farther fault conditions produce lower harmonic current or voltage than closer faults is  References [14][15][16] try to resolve some of the problems of the approaches provided in [11,12] by proposing new protection methods based on transient AC voltage and current. Unfortunately, a comprehensive study on the effect of fault location and line length is not presented in these papers. For example, in [14,15], an internal fault at the end of the line, due to the assumption of lowest harmonic production, is considered as the worst-case scenario, and based on that, conclusions are derived. However, based on the analysis of this paper and Figure 16, for example impedance and harmonic content of the system during faults are periodic, and dependent on the fault location and line length. Therefore, the assumed internal fault at the end of the line may not necessarily be the worst-case scenario, which can affect the conclusions of [14,15].
The proposed method presented in [13] is a quite robust and reliable solution. Since this method is completely relying on behaviour of the DC filters harmonic current, there is no need to investigate the impact of fault location, fault resistance and line length on the performance of the method. However, compared to [13], the proposed method of this paper still has the advantage of identifying the accurate fault location.

Comparison to current differential protection
The current differential protection is a backup protection in HVDC transmission lines. Due to intense transient fluctuations caused by faults, a time delay, which may last up to at least 1.1 s after faults, is essential for safe operation of the current differential protection [5]. In contrast, the only time constraints that the proposed protection method of this paper has are related to the communication link and time window for calculations. Therefore, generally, the proposed protection method is much faster than the current differential protection scheme. In comparison to single-ended protections, the proposed protection scheme requires a communication link to transfer data of the output impedance (Z out ) to the rectifier side, in order to be used in the protective algorithm. Generally, the quantity of information to be transmitted and other factors, such as speed, reliability, availability and cost, are important in determining the type of communication link. Currently, optical ground wires (OPGWs) are widely used with a transfer delay of approximately 4.9 µs/km [34]. Thus, for the 1200 km line of this paper, the total time delay will be around 5.88 ms. This delay is completely acceptable for a backup protective solution. As far as the reliability of the link is concerned, OPGWs are immune to electromagnetic interference and faults in the transmission lines [34]. Therefore, delay of data transfer and reliability of the link should not be a major concern, although they cannot be completely ignored either. Moreover, since in the proposed protection method a large amount of data is not being transferred, a communication link with the same speed of that already used for the current differential protection scheme is sufficient. This feature makes the proposed pilot protection scheme quite practical, and readily applicable to existing HVDC structures. When it comes to measuring equipment, measurements of DC voltage and current are already performed at both sides of the transmission line for control and protective purposes. The hardware of control and protection in HVDC stations commonly consists of unified series of products such as, SIMATIC-TDC series by SIEMENS [5], and the proposed protection method can use the already provided data to perform its protective duties. Since a high sampling frequency is not also necessary, no particular measuring instruments are also required. Overall, in comparison to requirements of the current differential protection method, no major additional costs are imposed on the system.

CONCLUSION
The current paper introduced a novel pilot protection scheme based on the behaviour of input and output impedances of characteristic harmonics during internal and external fault conditions. The impact of various important factors, such as fault location, fault resistance and line length on the performance of the proposed protection method was investigated through in-depth theoretical and simulation analysis. It was revealed that the periodic behaviour of the characteristic harmonic impedances can result in mal-operation of various distance and boundary protections, which can be avoided by the proposed method of the paper. Using a modified version of the monopolar CIGRE benchmark system, simulated in PSCAD/EMTDC software and applying MATLAB codes, the performance of the protection method was investigated. Based on the theoretical study and the simulation results, the proposed method can effectively distinguish internal faults, and even estimate the fault resistance. Moreover, not only the proposed protection method serves well under DC line faults, but also it is reliable during AC system faults and various DC system operating points.