Unified multimode modelling, stability analysis, and reinforced sliding‐mode design of high‐order buck/boost DC–DC converters for DC energy systems

National Natural Science Foundation of China, Grant/Award Number: U1766210; National Natural Science Foundation of China, Grant/Award Number: 5162570 Abstract Unified modelling, analysis, and reinforced sliding‐mode design of a high‐order buck/ boost converter are proposed for DC energy systems. The high voltage gain with low current stress on the converter’s circuit components will noticeably improve its performance in DC energy systems. The mathematical model of this multimode converter is established by deploying the averaging state‐space modelling approach and a duty‐ratio constraint‐deriving method. According to the unified multimode model, a reinforced sliding‐mode controller is proposed for this converter, and the sliding surface is designed using the estimated load information. A complete stability analysis of the reinforced sliding‐mode regulated converter system is also carried out. In addition, a hardware‐based comparison study involving the proposed controller and an existing robust sliding‐mode controller is provided to validate the effectiveness of the unified workflow involving modelling, analysis, and regulation design.


| Literature review
DC-DC buck/boost converters have been applied in many commercial applications such as household appliances, spacecraft power systems, and electric vehicles [1]. The output voltage of the built-in battery used in these applications is highly variable, and thus, a well-regulated DC-DC converter is required to produce stable output voltage [2]. The voltage gain of the traditional buck/boost converter is quite limited, as operating this converter at high values of the duty cycle to achieve high gain has several limitations. In addition, the employment of a traditional converter not only leads to extremely voltage stress on switching devices but may also result in electromagnetic interference generation that demands the use of input and output filter circuitries [3]. To deal with this problem, several novel buck/boost DC-DC converter topologies have been proposed recently [2][3][4][5][6][7]. In [2,[4][5][6], various converter topologies have been derived by integrating the KY converter with the conventional buck/boost converter to increase the voltage transfer gain. Although the output voltage ripples are suppressed by the reported converters, these converters require at least two power switches for implementation. Not only are cost and implementation complexity increased, but also extra conduction losses in the converter are introduced. Moreover, some capacitors in the KY converter will be suddenly charged in some operating modes, which leads to high current stresses on circuit components. In [3], hybrid switched-capacitor (SC) converters with a single active switch have been proposed. For the high voltage gain, these converters embed the SC circuit. Nevertheless, the SCs could be charged abruptly when the state of the power switch is changed. This might result in the excessive current stress on circuit elements.

| Motivation
Considering the concerns above, a high-order buck/boost DC-DC converter based on the Cuk converter was proposed recently in [7]. Compared with the conventional buck/boost converter, this converter possesses a higher voltage gain. In addition, thanks to its multimode operating property, the abrupt capacitor charging problem in [2][3][4][5][6] is avoided, and current stresses on circuit components are also reduced. Moreover, compared with the KY converter, the single-switch feature of this high-order converter reduces power losses [2,[4][5][6]. The converter also reduces output voltage ripple.
This paper mainly focuses on the modelling and control approach for the high-order buck/boost DC-DC converter [7] in DC energy systems. Modelling of high-order DC-DC converters has received increasing attention recently, as their dynamic models are needed in the design of controllers for such converters-for example, in [8][9][10]. The modelling of high-order converters is rather complex and may require advanced techniques. Despite various advantages for the highorder buck/boost converter, its dynamic model is currently unavailable because of its multiple modes. Unlike most highorder DC-DC converters [2][3][4][5][6], this converter possesses three distinct operating modes instead of two in the continuous-current mode (CCM). Therefore, the conventional state-space modelling technique [10][11][12] cannot be directly used to obtain the dynamic model of this converter, and thus, its modelling requires other techniques.
In the meantime, the development of control strategies for high-order DC-DC converters and other applications has drawn increasing attention [9,[13][14][15][16][17][18][19][20][21][22]. In [13], the authors proposed a single-loop controller for the DC-DC quadratic converter. The reported controller only needs the output voltage for the feedback. The linear current-mode controller for a fifth-order DC-DC converter is reported in [14]. However, because the exact value of the load resistance is required to design the control law, such a controller is not suitable for applications where the load resistance is unknown. To overcome this drawback, an adaptive current-mode controller was proposed in [9]. In this control scheme, the load resistance is estimated by an estimator. Because of its high robustness against external parameter disturbances and system uncertainties [15], the sliding-mode control (SMC) is a widely adopted non-linear control technique to regulate DC-DC power converters, smart grids, microgrids, and wireless power transfer systems [16][17][18]. Considering the low-voltage grid fault, the SMC was employed in doubly fed induction generators to withstand the voltage dip of smart grid [16]. Because of their robustness properties against uncertainties, distributed generators were empowered by the SMC facing arbitrary topology [17]. In the series-series compensated wireless power transfer system, the fastest maximum energy efficiency was achieved by the discrete SMC [18].
For DC-DC power converters, the sliding surface of the traditional hysteresis-based SMC is determined by the inductor current of the converter. Based on the output voltage error, the reference current trajectory is calculated with the proportionalintegral (PI) controller. Several SMCs have been proposed in [15,[19][20][21][22] for high-gain DC-DC converters that are easy to implement and offer good regulation under various system operating conditions. However, some SMCs, such as those used in [20][21][22], still adopt the traditional PI control technique to generate control efforts. In such PI-SMC designs, there is a trade-off between the quality of the start-up dynamic response and that of responses in the presence of load changes. Our investigations reveal that if the outer-loop PI controller is tuned with a large value for integral gain, the start-up overshoot of the output voltage is large. If a small integral gain value is used to suppress the overshoot, the speed of the load change response is reduced significantly. With this concern, designing a suitable SMC for high-order DC-DC converters remains an open problem that must be addressed.

| Contribution
To enhance the management of DC energy systems, the modelling, stability analysis, and controller design for the highorder buck/boost converter [7] are carried out. The four contributions of this paper are as follows: (1) Unified modelling. The proposed model is the first averaged state-space model for a high-order buck/boost converter operating in CCM. It is derived by unifying the averaged state-space modelling approach and adopting a duty-cycle constraint-deriving technique.
(2) Multiple-domain validation. The converter prototype is implemented in PSIM version 9.0 to validate the established model in both the time and the frequency domain.
(3) Reinforced design. In addition, a reinforced slidingmode controller is proposed to improve the robustness of the converter system against external disturbances. A recently developed adaptive scheme is adopted to estimate the value of the converter load conductance.
(4) Stability boundary derivation. The existence condition for the sliding behaviour and the stability condition of the closed-loop system are also comprehensively derived, which provides theoretical guidelines for parameter tuning.
Three novelties are noted here. Besides the novelty of controller application, there are novelties in the modelling and stability derivation. A unified modelling strategy is developed for the high-order buck/boost converter and has been verified in the time and frequency domains simultaneously. To the best of our knowledge, this is the first work that elaborates the modelling step for this high-order converter. Moreover, the hitting, existence, and stability conditions are theoretically derived for the converter and control scheme, which establishes the elaborate stability boundary.

| Organization
The remainder of this paper is organized as follows. The multiple operating modes and unified modelling strategy of the highorder buck/boost converter are presented in Section 2. The average state-space model and small-signal linearized model are completely established. For the aspects of time-domain and frequency-domain, Section 3 validates the effectiveness of the modelling strategy. On the basis of the developed model, a reinforced design scheme for the sliding-mode controller is proposed in Section 4 that achieves the desired transient response during the start-up stage and external fluctuations. To theoretically guarantee the convergence of the state variables, the stability condition and tuning guidelines are formulated in Section 5. A comprehensive stability proof provides the backbone for the modelling and control approach. To investigate the performance of the proposed unified model and the reinforced sliding-mode controller, hardware experimental results are demonstrated in Section 6. The experimental results are discussed, and the proposed controller's advantages over existing controllers are then illustrated, in Section 7. Finally, the conclusion is drawn in Section 8.

| UNIFIED MODELLING OF HIGH-ORDER BUCK/BOOST CONVERTER
In this section, the averaging model of the analyzed converter in CCM is presented. Figure 1 shows the three CCM operating modes of the analyzed converter. Corresponding to multiple operating modes, the piecewise-linear waveforms of main state variables are presented in Figure 2. In Figure 2, d 1 and d 2 represent the duty cycles of the first and second operating intervals, respectively.
To derive the average model for this converter, the following assumptions are adopted: (1). The input source E is an ideal DC source.
(2). Capacitors C 1 , C 2 , and C 3 have the same capacitances, where . There are zero AC ripples in the output voltage due to C o having a large capacitance value. (4). The semi-conductors in this circuit are ideal, that is, losses are neglected. (5). The parasitic resistances of capacitors and inductors are ignored.
According to Figure 2, it can be seen that the waveforms of v C1 , v C2 , and v C3 all contain non-linear parts. Because the non-linearities are not severe [7], the waveforms of v C1 , v C2 , and v C3 are reasonablly assumed as piecewise-linear.

| Multiple operating modes
Mode 1 ½t 0 ; t 1 �: The switch Sw is switched on, and the diodes are switched off. The input source is charging the inductor L 1 . The energy stored in C 1 is released to L 2 , C 2 , and L 3 . In addition, the load is fed by C 1 . At the same time, C 3 transfers the stored energy to the inductor L 3 and the load. The duration of mode 1 can be expressed as d 1 T s , where T s is the switching period. From Figure 1(a), the corresponding state-space model can be derived as In Equation (1), i L1 , i L2 , and i L3 are the inductor current of L 1 , L 2 , and L 3 , respectively, and the voltages across capacitors respectively. Hereafter for simplicity's sake, the state variables Sw is switched off, and the diode D 2 is switched on. Because the voltage across C 2 is greater than that of C 3 , the diode D 1 is still turned off. Due to the conduction of D 2 , the energy is transferred from the input source to C 1 and C 3 . Meanwhile, C 2 is discharging. All the inductors are linearly demagnetized, which transfers their energies to the capacitors (except C 2 ) and the load. In addition, C 2 releases the stored energy to the load. Mode 2 is terminated when the voltage across C 2 equals that across C 3 . The duration of mode 2 is given by d 2 T s . According to Figure 1(b), the corresponding state-space model can be obtained as  Mode 3 ½t 2 ; T S �: At t 2 , the capacitors C 2 and C 3 are parallel, which results in diode D 1 being turned on. The switch Sw and diode D 2 are still turned off and turned on, respectively. Due to the conduction of D 1 , the capacitors C 2 and C 3 are in parallel, and thus their voltages are the same. The voltage source charges C 1 and demagnetizes L 1 . In addition, capacitors C 2 and C 3 are charged by the energy stored in L 2 , but the stored energy in C 2 and C 3 is released to L 3 and the output branch. Because the charging current i L2 is approximately equal to the discharging current i L3 as shown in Figure 2, the voltage across C 2 and C 3 is considered constant. The duration of mode 3 is given by Similarly, the corresponding state-space model can be obtained as Collecting Equations (1)-(3) yields the following statespace model of the converter:

| Averaged state-space model
As A ð1;2;3Þ , B ð1;2;3Þ ; and E are all constant and B 1 ¼ B 2 ¼ B 3 , using the averaging techniques, the averaged _ xðtÞ over a switching period (considering t ∈ ½0; T s �) is expressed as Equation (5): To clearly show the derivation of the averaged state-space model of the analyzed converter, the averaging processes of several key state variables are given first. The average of the inductor current i L1 can be expressed as According to Figure 2, Equation (6) can be simplified as In addition, the two integration terms in Equation (7) can be calculated as Substituting Equation (8) into Equation (7) and considering the volt-second balance principle in the inductor Hence, the integrations in Equation (6) can be expressed as Because the shapes of the waveforms of i L2 , i L3 , and v C1 are similar to that of i L1 , to avoid redundancy, the derivations of the averages of i L2 , i L3 , and v C1 are not given here.
Similarly, the averaging state of V C2 and V C3 can be expressed as follows: Based on Figure 2 and current-second balancing feature of the capacitors (v C2ð3Þ ðt 0 Þ ¼ v C2ð3Þ ðt 2 Þ), Equation (12) can be rewritten as The integration terms in Equation (11) can then be derived as Substituting the converter dynamic Equations (1)-(3) into Equation (14) and considering Equations (10) and (13), the averaged state-space model of the analyzed converter is derived as where DONG ET AL.

| Duty-ratio constraint
The duty ratio of the first operation stage d 1 is the sole external control input, whereas the duty ratio of the second operation stage d 2 is a function of d 1 and state variables. This algebraic function is known as the duty-cycle constraint of d 2 [23]. To complete the average modelling of the converter, the duty-cycle constraint needs to be found.
According to Figure 2, the average values of the state variable x 5 and x 6 can be obtained: where Δx ð5;6Þ is the variation of x ð5;6Þ during mode 1 (t ∈ ð0; d 1 T s �), and h C is the value of x 5 and x 6 at the start of each switching period. Using Equation (1), Δx 5 and Δx 6 can be obtained as Substituting Equations (16) and (17) into Equation (15), the mean values of x 5 , x 6 yield With Equations (18)- (19), the duty-ratio constraint of d 2 is given by

| Small-signal linearized model
In addition to the non-linear dynamic model, the small-signal linearized model is a useful tool to facilitate the design of the controller as well as analyze the stability for the controlled system. Hence, the small-signal model of the high-order DC-DC buck/boost converter is presented in this subsection. On the basis of the averaged state-space model Equation (14) and duty-ratio constraint Equation (20), the following equilibrium point of (14) is calculated: where  (21), the equilibrium value of the duty ratio d 1 is given by Thus, the voltage gain of this converter can be obtained as 2D 1∞ 1−D 1∞ . To investigate system stability, the small-signal model of Equation (14) is derived. By linearizing Equation (14) around its equilibrium point Equation (21) and defining the small perturbations of the state variables asx ¼ ½x 1 ;x 2 ;x 3 ;x 4 ; x 5 ;x 6 ;x 7 � T and that of input variable asû ¼ ½d 1 where A ss and B ss are presented in Equations (14a-14c).

| MODEL VALIDATION
In this section, the validity of the established model of the converter is assessed using both time-domain and frequencydomain approaches. The converter prototype was implemented in PSIM version 9.0. For the purpose of illustration, the following circuit parameters are adopted in this section:  disturbances and load change. The nominal value of the duty radio d 1 was set at two-thirds. At t = 0.5 s, d 1 was increased by 1%. In the case of load change, the value of R was changed from 500 to 350 Ω (70% of its nominal value) at t = 0.8 s. It can be seen from Figure 3 that the derived model can accurately predict the large-signal time-domain behaviour of the converter.

| Frequency-domain validation
From the small-signal model derived previously, the smallsignal frequency-domain characteristics of the proposed averaged model are validated in this subsection. To this end, the duty ratio concerning the output and the input-to-output transfer functions are derived first. Applying Laplace transform to Equations (22) and assuming zero initial conditions givesx where M ¼ ½0 0 0 0 0 0 0 1�, s is a complex variable, and I is a 7 � 7 identity matrix. Expanding Equation (24) yieldŝ Using the superposition theorem, the duty-ratios with respect to the output and input-to-output transfer functions are obtained: GÊv o ðsÞ ¼x 7 ðsÞ EðsÞ The circuit parameters given in Equations (23) Figure 4 shows the small-signal frequency-domain responses of (28) and (29) (solid blue line) and the detailed simulation circuit (red star line) for circuit parameters given in (23). Because the assumptions adopted in the derivation of the small-signal linearized model are invalid beyond half of the switching frequency [8,24], the upper limit frequency was set at 25 kHz. The magnitude and phase figures of (28) and those of the switching circuit are shown in Figure 4(a). It can be seen that a perfect matching for up to half the switching frequency (25 kHz) was achieved. The Bode plots of (29) and those of the switching circuit are given in

| REINFORCED SLIDING-MODE DESIGN
The transfer function of duty ratio-to-output Equation (28) contains zeros in the right-half complex plan. Thus, using the conventional linear voltage mode control technique will result in a narrow closed-loop bandwidth giving a slow output transient response [25]. In addition, because the linear current-mode controllers are designed based on the small-signal model of the converter systems, good control performance cannot be guaranteed against large-signal perturbations. To overcome the drawbacks of the linear controllers, many non-linear controllers are merged to regulate the DC-DC converters. Among these controllers, the sliding-mode technique is well known because of its robustness against large-signal perturbation and converter uncertainties.
As mentioned previously, it is difficult to achieve a desired transient output response of the high-order converter system during the start-up stage as well as a desired dynamic output response in the presence of external disturbances using the traditional PI-SMC [20][21][22]. To overcome this problem, a hysteresis modulation (HM) reinforced sliding-mode controller is presented to regulate the highorder buck/boost converter. In this controller, an adaptive law is adopted that was first proposed in [9], where the load conductance is estimated. The main merit of the adaptive law is that the estimation's derivatives are bounded and optimized.

| Sliding surface design
The proposed controller is described by where σ is the defined sliding surface and K 1 , K 2 , ρ, and r are positive controller gains. The switching law of the proposed sliding-mode controller is given by u ¼ where δ is the hysteresis band.

| Existence condition
With the switching law in Equation (33), the hitting condition of the proposed SMC is satisfied. To guarantee that the state variables in the neighbourhood of the sliding surface always converge to the sliding surface, the existence condition needs to be met. The existence condition is fulfilled if the local reachability condition is satisfied ( _ σ is the time derivative of s). Using Equations (15) and (30)-(34) yields the existence condition given by In practical applications, disturbances in the input voltage and converter load are presented. In addition, the state variables vary for different converter operating conditions. To ensure that the sliding action is available in a wide converter operating range, the expected upper and lower bounds of E, � x 4 and the desired steady-state value of � x 7 are substituted into Equation (35) to give where E min and E max are the minimum input voltage and maximum input voltage, respectively, � x 4 min indicates the minimum voltage value across the capacitor C 1 , and � x 7 ss is the steady-state value of the converter output voltage. It is worth noting that existing conditions Equations (36) and (37) do not contain the load resistance R. Thus, the sliding-mode existence condition of the controlled system is insensitive to disturbance at the load side.

| THEORETICAL STABILITY ANALYSIS
Because of the model complexity of this seven-order converter, a numerical stability analysis is developed in this section to formulate theorems and guidance for implementation of the proposed control scheme. Based on the designed sliding surface and established small-signal model, an explicit analysis workflow is presented in Section 5.1. In addition, tuning guidelines are established in Section 5.2 to guarantee controller robustness against external disturbances.

| Stability condition
The hitting and existence conditions guarantee that all state variables move towards and finally stay on the sliding surface. However, convergence of the state variables to the desired equilibrium point must be further determined. Towards this end, a small-signal model analysis approach based on the equivalent control method is employed [19][20][21]. By using Equations (14), (30), (31), and (32) and letting _ σ ¼ 0, the equivalent control law can be derived as ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffiffi � On the basis of Equation (41), the equivalent expression of d 2 can be established as Using d 1 eq and d 2 eq to replace d 1 and d 2 in Equation (14), respectively, results in the ideal sliding dynamics as where A eq and B eq are given in (32a) and (32b).
The small-signal model of Eqionuation (40) can be obtained by substituting Equations (38) and (39) into Equation (40) and linearizing the resulting non-linear system around its equilibrium point (21). As the derivation is tedious and has been presented previously, the small-signal model will not be shown here.
The key result of this section is summarized below. Proposition 1 For any given output reference voltage V d where 0 < E < V d < ∞, the proposed adaptive sliding-mode controller Equations (30)-(32) with appropriate controller gains K 1 , K 2 , ρ, and r can locally asymptotically stabilize the analyzed converter system Equation (14) to its equilibrium point for any load value of 0 < R < ∞. DONG ET AL.

| Tuning guidelines
To gain a better idea of how the values of controller gains affect the converter output response, the tuning guidelines of the controller gain are investigated in this section. Some simulations using MATLAB R2014a were carried out. The same set of circuit parameters values in Equation (23) was used to obtain the simulation results.
Using various controller gains, the corresponding output voltage dynamic responses during the start-up stage in the presence of a load-resistance change from R ¼ 500 Ω to R ¼ 350 Ω and vice versa are given in Figure 6. Figure 6(a) shows the dynamic voltage responses with varying values of ρ (other controller gains are fixed). It can be seen that as the value of ρ is increased, the settling time both during the startup stage and in the presence of load-resistance disturbances decreased. Moreover, a high value of ρ leads to a large start-up overshoot and a small value of voltage variations when the load resistance is suddenly changed. The output responses with varying values of ρ (other controller gains are fixed) are illustrated in Figure 6(b). The controller gain r has an effect on the output voltage response similar to that of controller gain ρ. Using the fixed value of ρ and r, the converter output voltage with varying K 1 and K 2 are shown in Figure 6(c) and 6(d). As seen in Figure 6(c), as long as the value of K 1 K 2 is fixed, the converter output response does not change for varying values of K 1 and K 2 . The waveforms in Figure 6(d) indicate that increasing the value of K 1 K 2 leads to decreased overshoot during the start-up stage as well as a shorter settling time in the output response.
Based on the above observations, a heuristic but practical approach to selecting the controller gains is to start with small values of ρ, r, and K 1 K 2 . The value of ρ can then be increased to achieve a larger output voltage convergence rate. After ρ is selected, a considerably large value of K 1 K 2 can be selected to suppress the overshoot caused by the high value of ρ. Finally, an appropriate value of r is chosen to refine the achieved output voltage response.

| HARDWARE EXPERIMENTAL RESULTS
To verify the accuracy of the proposed unified model and the effectiveness of the reinforced sliding-mode controller, a laboratory prototype system was developed. In addition, for the purpose of carrying out a comparison study involves the proposed reinforced controller and an existing sliding-mode controller, so the latter is also implemented. The MOSFET IRFP460 and STTH2002 C diodes were adopted to implement the converter hardware. A hysteresis comparator was built using LM393 and FFCD4027 B to generate the switching signal for the power switch. The hysteresis band was set as δ ¼ 0:05.
The experimental circuit parameters are as follows: Remark To avoiding the potential saturation problem in the implemented controller circuit, all the feedback signals, namely, input voltage E, output voltage v o , inductor current i L 1 , and reference output voltage V d were scaled down by 10 times before they were connected to the controller circuit.

| Existing proportional-integral slidingmode control
According to [20], a PI-SMC for the high-order buck/boost converter can be derived as Selecting the controller gains K p ¼ 0:075 and K i ¼ 20, the corresponding output voltage dynamic response at the start-up stage is illustrated in Figure 7(a), and that caused by the load-resistance step change is shown in Figure 7(b). Although after the onset of the load disturbances, the controller given in Equations (43)-(45) regulates the output voltage to its reference with a short settling time (around 0.12 s) and small voltage overshoots (around 7% of its nominal value), the start-up voltage overshoot is relatively large at around 12% of the nominal output voltage. By changing the controller gains to K p ¼ 0:075 and K i ¼ 5, the corresponding output dynamic responses at the start-up stage and in the presences of load-resistance changes are as shown in Figure 7(c) and 7(d), respectively. It can be seen that the smaller K i fully suppresses the voltage overshoot at the start-up stage. However, after the onset of the loadresistance disturbance, the settling time is prolonged (around 0.26 s), and the voltage overshoots also increase (around 13% of the nominal output voltage). It can be easily seen that a good balance between the dynamic performance of the output response at the start-up stage and that in the presence of load-resistance disturbances is difficult to achieve using the SMC given in Equations (43)-(45). DONG ET AL. In this subsection, the experimental results obtained using the proposed controller are illustrated. Here, the controller gains are selected as K 1 ¼ 1, K 2 ¼ 1.5, σ ¼ 5 and ρ ¼ 10, respectively. The output voltage response at the start-up stage is shown in Figure 8(a). It can be seen that the output voltage tracks its reference V d ¼ 20V rapidly without overshoot. Similarly, the output voltage dynamic responses in the presences of load-resistance disturbance are shown in Figure 8(b). Specifically, the resistance of R was changed from F I G U R E 7 Output responses of an existing sliding-mode control (10 V/div, 500 ms/div).  Figure 8(c). The input voltage E changes from 5 to 3.3 V and then is restored to 5 V. It can be seen that the output voltage converges to its reference within 0.05 s, and the output voltage variations are quite small (around 4% of its nominal value). Figure 8(d) shows the output voltage transient response in the presences of a change in the reference output voltage V d from 20 to 25 V. Again, the output voltage rapidly converges to its new reference.
According to the experimental results, the proposed reinforced sliding-mode controller is competent to control the high-order buck/boost converter system in the presence of various disturbances. In addition, it also overcame the 'tradeoff' problem in the existing SMC of Equations (43)-(45).

| DISCUSSIONS AND ADVANTAGE ANALYSIS
As can be seen from Figures 7 and 8, the proposed controller provides a converter output voltage with a good transient response and is robust against load-resistance variations. The integration of SMC and the adaptive integral action empowers the simultaneous achievement of two response requirements. For the PI-SMC, the controller output varies with the error between the reference and the instanton measurement shown in Equation (46): Because of the traditional integral component in Equation (46), the dynamic requirement of voltage disturbance and load disturbance cannot be satisfied. The larger error leads to larger controller output. However, the reinforced strategy deploys the improved integral controller: It can be seen from Figure 9 that the relationship between dθ/dt and v o ðtÞ − v d is normalized within [−1, 1]. Moreover, dθ/dt is large only when the error approximates 0. By this normalized integral behaviour, the dynamic responses for the voltage reference and external load are automatically balanced.

| CONCLUSION
A unified averaging state-space model of a high-order buck/ boost DC-DC converter operating in DC energy systems was proposed. By using the averaging technique, an averaging model covering all the operating stages of the converter was derived. In addition, to simplify the converter stability analysis and controller design, a duty-ratio constraint was introduced. The accuracy of the proposed averaging model was verified in both the time and the frequency domain. In addition, a reinforced sliding-mode current controller for the analyzed converter was designed. The stability of the closed-loop converter system was investigated.
In addition, complete hardware comparisons of the proposed controller and an existing PI-SMC were carried out. All the results demonstrate that the proposed controller introduces superior control performance.

ACKNOWLEDGEMENT
This work was funded by China Postdoctoral Science Foundation (Grant No. 2020M680880) and partly supported by the joint project of NSFC of China and EPSRC of UK (Nos. 52061635103 and EP/T021969/1)