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4 bit CLA-based conversion from redundant to binary representation for CMOS simple and multi-output implementations

4 bit CLA-based conversion from redundant to binary representation for CMOS simple and multi-output implementations

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New equations for converting a redundant number into its two's complement representation are presented. This enables converters to use conventional CMOS adder structures in dynamic logic, multi-output logic and differential logic. Static 4 bit CLA circuits with a compact, regular, fast, simple and multi-output structure are described.

Inspec keywords: redundant number systems; CMOS logic circuits; adders; carry logic

Other keywords: redundant number conversion; two's complement representation; differential logic; CMOS; multi-output logic; binary representation; dynamic logic; adder structures; CLA-based conversion; multi-output implementations

Subjects: Logic circuits; Logic and switching circuits; Digital arithmetic methods; CMOS integrated circuits

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