Eighty nine‐watt cascaded multistage power amplifier using gallium nitride‐on‐silicon high electron mobility transistor for L‐band radar applications

Centres of Excellence in Science and Applied Technologies Abstract This work presents a gallium nitride (GaN) high electron mobility transistor (HEMT)– based cascaded multistage power amplifier (MPA) in class‐AB for L‐band radar applications. The purpose of this endeavour is to develop an MPA using GaN HEMT devices to achieve optimised parameters such as high gain, high power, better efficiency, and linearity in a compact size. In an MPA design with multiple stages, oscillations are common owing to unwanted high gain at the lower frequency range. To overcome this issue, we introduced interstage harmonic termination networks as a novel approach to suppress high gain at low frequencies, which are prone to oscillations. The proposed cascaded MPA provides the maximum radio‐frequency output power of 89 W and a power gain of 52 dB with an associated power‐added efficiency of 51%. Second and third harmonic levels are −32.5 and −37 dBc, respectively. Two‐tone measurements are performed with a frequency separation of 10 MHz, and an intermodulation level of less than −33 dBc is achieved.

We present the cascaded MPA in class AB using GaN HEMT devices for L-band radar applications. We used Nitronex (now part of MACOM) GaN HEMT devices. The capability of Nitronex GaN HEMT epi wafer technology is attributed to the development of novel transition layers that accommodate stresses originating from differences in properties of Si substrates and GaN materials. Hence, GaN-on-Si HEMT devices offer high power performance, ideally suited for inexpensive RF circuits [4]. In this work, we used a nonlinear model of Nitronex devices to extract optimum impedances for output power [12]. Section 2 highlights the design aspects of MPA including amplifiers, a power divider/ combiner, and harmonic termination networks (HTNs), whereas Section 3 shows the realization and evaluation of the proposed cascaded MPA. The HTN technique is introduced as an approach to suppressing low-frequency oscillations. A conclusion is provided in Section 4.

| DESIGN ASPECT OF CASCADED MULTISTAGE POWER AMPLIFIER
The proposed MPA consists of four cascaded stages, as shown in Figure 1. The ultimate goal is to achieve more than 80 W output power with a gain of up to 50 dB. The proposed design consists of gain block, pre-, driver, and high-PA (HPA) stages. The first three stages are cascaded directly, whereas HPA is integrated with a power divider/combiner to enhance output power up to the desired level. The proposed MPA design consists of subsections: i. Individual amplifiers ii. Power divider/combiner iii. Cascaded MPA iv. HTNs v. Power supply unit

| Design and development of individual amplifiers
To design the MPA, Advanced Design System (ADS) software from Keysight Technologies is used. Amplifiers are designed in class AB at the centre frequency of 1. 3  An MMIC of Hittite technologies (HMC479) is selected as a gain block. The key advantage is internal matching; therefore, coupling is selected according to the desired frequency with low equivalent series resistance and high self-resonance frequency along with a 50-Ω microstrip line. The bias network consists of a λ/4 transmission line and bypass capacitors, as shown in Figure 2.
The fabricated amplifier is characterised using a vector signal generator (VSG) and spectrum analyser (SA). The obtained results are shown in Figure 3, which indicates that the power gain and 1-dB compressed output power (P 1dB ) are 12.8 dB and 16.5 dBm, respectively.

| Preamplifier (second stage)
This is designed using a GaN HEMT from Nitronex (NPTB-00,004). To operate in class AB, the quiescent-point (Q-point) is determined by DC analysis with a drain-source current (I dq ) of 50 mA, as shown in Figure 4.
Then, a stability analysis of the transistor is performed using S-parameters. A hybrid stabilising network with a shunt resistor of 220 Ω (Rs2) and a parallel RC circuit (Rs1 and Cs) is implemented to ensure the unconditional stability of the transistor. The schematic of the preamplifier is shown in Figure 5.
After the stability analysis, small signal simulations of the transistor with the stability network are performed to observe the maximum available gain (G max ) and S-parameters, as shown in Figure 6a. The G max of the network is 20.4 dB, whereas the small signal gain (S 21 ) is 15 dB with no matching network. This shows that the transistor can be matched to have a gain as high as ∼19.5 dB, considering ∼1 dB loss. To extract the optimum load and source impedances, the operating power gain (G p ) of the transistor is investigated, as shown in Figure 6b. To achieve a G p of 18.5 dB, the optimum load impedance should be 37.13 + j26.19 Ω. For optimum source impedance, the conjugate matching is performed, using the relation: where: From Equations (1) and (2), the corresponding source impedance is 12.64 − j11.58 Ω. L-type hybrid matching networks are used to transform the impedances, where source and load matching networks include lumped components (TL-Cm and Lm-stub, respectively). The electrical lengths of TL and stub are 12.36 and 29.47 degrees, respectively.
In an amplifier design, bias networks are also important to avoid the possibility of oscillation and interference. Therefore, RF chokes of λ/4 microstrip lines are designed with high impedances at ∼92 Ω. The inductances of λ/4 microstrip lines are also calculated and replaced by inductors (Ls2 and Ls3) to reduce the PCB width. Furthermore, decoupling capacitors banks (Cb1, Cb2, and Cb3) and (Cb4, Cb5, and Cb6) are implemented at both the gate and drain bias networks, as shown in Figure 5. The preamplifier is simulated with matching and biasing networks. It is fabricated with the rest of the circuit. The simulation and measurement results of gain (G), P 1dB , and power-added efficiency (PAE) are given in Figure 7. Although there is a slight variation in simulated and measured results, the obtained results still show good agreement and validate the design approach.

| Driver amplifier (third stage)
To meet the input requirements of the HPA, a driver amplifier is designed to achieve P out ≥ 39 dBm with G ≥ 12 dB. High power is targeted with a 10-dB back-off for better linearity. The nonlinear model of GaN HEMT (NPTB00025) of Nitronex is used. Q-point is selected at I dq = 125 mA (V gs = −1.5 V). λ/4 microstrip lines along with decoupling capacitors are used to bias both the gate and drain.
A schematic of the driver amplifier is shown in Figure 8, where the stability is achieved through an RC parallel network at the gate. L-type hybrid networks are implemented at both the input and output for matching. In these networks, the electrical lengths of TLin and TLout are 4 and 13.31 degrees, respectively, whereas TLb1 and TLb2 are 90 degrees each. After the schematic design, one-tone harmonic balance (HB) simulations are performed to evaluate G, P 1dB and PAE. After fabrication on a similar Roger substrate (TMM10i), large signal measurements of driver amplifier are performed. The measurement results are plotted together with the simulation results in Figure 9. The measured G, P 1dB , and PAE are 12.6 dB, 41.7 dBm, and 56%, respectively. The variation in simulated; the measured results may result

| High-power amplifier
In an HPA design, the large signal technique is used with a nonlinear model of GaN HEMT (NPTB-00,050) of Nitronex to attain the maximum output power. From DC analysis, a class AB bias point is chosen at I dq = 240 mA (V gs = −1.5 V). Here, stability is achieved through a bias resistor (Rb) and impedance matching networks, using the same technique implemented in published GaN MMICs [13]. Load-and source-pull simulations are performed to extract optimum impedances at the desired frequency (1.3 GHz). The extracted source impedance is 3.16 − j20.42 Ω, and it provides an output power of 45.5 dBm with PAE of 59%. Similarly, a load-pull analysis is performed and the extracted load impedance is 14.18 − j12.29 Ω [14]. To transform the extracted impendences, an L-type matching network (Lm and Cm) is used at the input whereas the balanced stub method is implemented at the output. The electrical length of each stub is 38.36 degrees, and it is 90 degrees for λ/4 transmission lines (TL1 and TL2). The schematic of the HPA is shown in Figure 10.
From the HB simulation, P 1dB, G, and PAE are achieved as 45.8 dBm, 15.3 dB and 69%, respectively, as shown in Figure 11. After fabrication, HPA is characterised with stateof-the-art RF instruments using the setup shown in Figure 12. The measured results of P 1dB, G, and PAE are 45.5 dBm, 13.5 dB, and 63%, respectively, as given in Figure 11. The slight variation between the simulation and measurement results observed may be due to heating issues, because HPA is characterised on a metallic (aluminium) plate, which was not dissipating heat adequately. In the proposed MPA, two HPAs are used in parallel to enhance the output power with the designed power divider/combiner.

| Power divider/combiner
To attain high output power in the proposed MPA, a 3-dB Wilkinson power divider (WPD) approach [15][16][17] is implemented to handle output power up to 100 W. The schematic of the WPD is demonstrated in Figure 13, where 100 Ω is used between two quarter wave transmission lines (Z 1 = Z o √2).
S-parameter analysis is performed by simulation; the results are given in Figure 14

| Cascaded MPA
The designed blocks of individual amplifier stages and power divider/combiner are cascaded to realize an MPA in ADS software, where the schematic is similar to Figure 1 except for the circulator and the antenna. S-parameter analysis is performed from 200 MHz to 2.0 GHz; the results are given in Figure 15.
The simulation shows a small signal gain (S 21 ) of 63 dB at 1.3 GHz, whereas the µ-factor is above 1 throughout the whole simulation band. However, high value of S 21 of 75 dB is also observed at the lower frequency band. It indicates a high risk of instability that can affect the performance of the cascaded MPA. Therefore, to avoid the possibility of oscillations, HTNs are implemented as a novel approach between the amplifier stages.

| Harmonic termination networks
This HTN technique is implemented among the amplifier stages to reduce the gain at the lower frequency band. Moreover, stability between the amplifier stages is improved owing to the suppression of the oscillations. Consequently, the cascaded MPA will prove the proposed performance without instability problems.
Typically, HTN circuits are used to suppress second and third harmonics of PA to increase output power, PAE, and ruggedness. [18][19][20]. Nikandish et al. proposed an HTN technique to suppress the even harmonics in class F PA [21]. They claimed that this technique is useful for terminating an arbitrary number of harmonics in single as well as concurrent multiband for class F PA. Similarly, Mahdi et al. proposed an HTN technique to suppress high intermodulation and demonstrated an improvement in the linearity of the amplifier without degradation of efficiency [22]. Therefore, we propose HTNs as novel approach to enhancing the performance and stability of a cascaded MPA in compact size. A schematic of an individual HTN is shown in Figure 16.
A typical HTN consists of an inductor-capacitor network that acts as a notch filter at the desired frequency. Therefore, HTNs are implemented in the proposed MPA to suppress gain at the lower frequencies from 250 to 500 MHz. Transmission lines (TL1, TL2, and TL3) are designed with a constant length and width whereas the capacitance is changed from 36 pF (HTN-1) to 27 pF (HTN-2) to suppress S 21 at out-of-band lower frequencies. The simulated and measured results are shown in Figure 17

| Cascaded MPA with HTNs
The proposed MPA is modified by adding HTNs between the amplifier stages to minimise gain at the lower frequencies, as shown in Figure 18. HTN-1 is placed between the gain block and preamplifier, whereas HTN-2 is implemented between the pr-amplifier and driver amplifier. S-parameter analysis is performed to compare the small signal gain (S 21 ) of the cascaded MPA and the modified proposed cascaded MPA with HTNs, as shown in Figure 19. A remarkable reduction in S 21 (from 75 to 15 dB) is observed at the lower frequencies, whereas S 21 at the desired frequency is 57 dB with the same bandwidth of 100 MHz.

| REALIZATION AND EVALUATION OF PROPOSED MULTISTAGE POWER AMPLIFIER
After simulation, a compact mechanical housing is developed to realize the proposed cascaded MPA, which is shown in Figure 20. The stages are cascaded with interstage test points (TPs) to characterise individual components after integration and troubleshooting. The TPs are as follows: TP-1 is implemented to characterise the first two amplifier stages, TP-2 is designed as feed to the RF input of the driver amplifier as well as to characterise the HTN response (both in separate and integration configurations) whereas TP-3 is used to characterise the final stage (HPA) separately. To isolate reflections from previous amplifier stages, an isolator is also used at the input of the driver amplifier.
A small size of sequential power supply (shown in Figure 20) is also implemented as recommended for GaN HEMT devices [23]. It consists of four tuneable gate bias points. Variable resistors (trimmer) are also implemented to adjust the gate bias according to the desired Q-point of each amplifier. The dimension of proposed MPA is 190 � 100 � 22 mm 3 . After integration, the characterisation is performed as discussed subsequently.

| Small signal analysis
Small signal measurement is performed using a performance network analyser from Keysight. It is calibrated, using E-Cal, from 600 MHz to 2.0 GHz before S-parameter analysis. The measured S-parameter results are shown in Figure 21, where S 21 , S 11 and S 22 are 52.5, −14.6 and −4.0 dB, respectively. S 12 also gives the promising result of 75 dB. These results indicate a reasonable performance as desired. The bandwidth of proposed MPA is ∼100 MHz.

| Large signal analysis
This characterisation is performed in the following steps.

| One-tone analysis
It is performed to measure the output power, G, PAE, and harmonic distortion. A measurement setup similar to Figure 12 is used to characterise the proposed MPA. For this, a VSG from Keysight is used to sweep the input signal from −20 to +2 dBm at the desired frequency whereas the output power is measured on the SA from Keysight. A power attenuator is also used to keep RF instruments in the permissible limits. The measured one-tone results together with simulated results are shown in Figure 22.
The measurements show a maximum output power of 49.5 dBm (89 W), whereas the simulated and measured P 1dB results are closely matched. Similarly, the simulated and measured values of G are 57 and 52 dB, respectively. The variation in G (∼5 dB) is due to the cumulative effect of individual amplifier stages, as mentioned in the results shown in Figures 7, 9 and 11. Therefore, the input drive of the cascaded MPA is increased by 5 dBm compared with the simulation to achieve the maximum output power. Similarly, a variation in PAE is also observed owing to the change in RF input power. Moreover, power divider/combiner and interstage HTNs contribute to these variations.
Second and third harmonic levels are also measured; they are −32.5 and −36.9 dBc, respectively, as shown in Figure 23.

| Two-tone analysis
In RF communication, odd-order intermodulation distortions (IMDs) are important because these lie near the frequency of operation and may interfere with the desired signal. In general, two-tone analysis indicates the performance of the amplifier in the presence of strong interferers. Therefore, two-tone measurement was performed with a 10-MHz separation frequency (∆f) at the desired centre frequency using VSG. The measured results are shown in Figure 24, where IMD 3 is −33 dBc. The

| Comparison with published data
The performance of the proposed MPA is also compared with published data. In the MPA design, its performance mainly depends on the final stage of the amplifier (i.e. HPA). Therefore, we first compared the performance of HPA as shown in Table 1. The proposed HPA shows an optimal performance in terms of gain (G) and efficiency at the desired frequency of operation. We also observed that proposed HPA provided an IMD 3 level of about −33 dBc, which is good compared with Kilic and Demir [24], where the IMD 3 level is only -20 dBc. After a comparative analysis of HPA, we compared the performance of the proposed MPA with published data, as shown in Table 2. In comparison, the results of our proposed MPA is comparable to Giofré et al. [30] except for the output power; Giofré et al. developed an MPA for the L-band spaceborne Galileo System in the E1 band. Similarly, Garg et al. [31] developed a class F MPA at 1.25 GHz with a 24% duty cycle for pulsed radar application. This MPA has a bandwidth of ∼75 MHz with dimensions of 198 � 192 � 20 mm 3 , whereas our proposed MPA provides 89 W CW output power at 1.3 GHz with a bandwidth of ∼100 MHz, and the dimensions are 190 � 100 � 22 mm 3 (45% size reduction compared to Garg et al. [31]).
Hence, the performance of the proposed MPA is credible and provides a better trade-off between output power and efficiency with the desired gain and linearity.

| CONCLUSION
A compact and high-performance cascaded class AB MPA is developed for L-band radar applications. In this work, GaNon-Si HEMT devices of Nitronex are used for costeffectiveness. To achieve an optimised output power together with high power gain, efficiency, and linearity, small signal design techniques are applied for pre-and driver amplifiers. For HPA, large signal techniques are used to ensure high output power performance. Load and source-pull methods are used using non-linear models of GaN HEMT devices to extract the optimum impedances.
In MPAs, low-frequency oscillations may occur owing to the high gain. Therefore, HTNs are introduced as a novel approach to reduce high gain at the lower frequencies. Interstage TPs are also incorporated to characterise and troubleshoot individual components. Close agreement is achieved between the simulated and measured results, which reveals that the non-linear models of HEMTs used in the design are accurate and the parasitic effects are incorporated adequately to achieve the desired results in a real scenario. The measurement results of the proposed MPA show an output power of 89 W with a gain of 52 dB, and a PAE of ∼51.3% is achieved in compact size, making it a suitable candidate for L-band radar applications.