Advanced Processor Architecture
Having read of the many advanced radar techniques in the offing, processor architecture may seem of little import. But the fact is that most of the advanced capabilities of airborne radars to date have only been made practical by substantial increases in digital processing throughput. In the 1970s, multimode operation was made possible in fighters by replacing the hardwired FFT processor with a programmable signal processor (PSP) having a throughput of around 130 MOPS. In the 1980s, the addition of real-time SAR was made possible by quadrupling processing throughput. In the 1990s, the active ESA and other advanced capabilities of the F-22 were made possible by again quadrupling throughput. Vastly higher throughputs will be needed to make practical some of the advanced radar capabilities currently envisioned. Spread spectrum, for example, is highly desirable for both ECCM and LPI. Yet, even a 500 MHz instantaneous bandwidth will require 500,000 MOPS. In this chapter, we'll examine the key architectural features of the late 1990s-era processors: parallel processing, high throughput density, efficient modular design, fault tolerance, and integrated processing. We'll then take stock of a few technology advances which promise substantial throughput increases in the future.
Advanced Processor Architecture, Page 1 of 2
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