Issue 18, 2013
From the journal:

Nanoscale

Atomistic modeling of metallic nanowires in silicon†

Hoon Ryu,ae   Sunhee Lee,be   Bent Weber,c   Suddhasatta Mahapatra,c   Lloyd C. L. Hollenberg,d   Michelle Y. Simmons*c  and  Gerhard Klimecke  

* Corresponding authors

a National Institute of Supercomputing and Networking, Korea Institute of Science and Technology Information, Daejeon 305-806, Republic of Korea
E-mail: elec1020@gmail.com

b Samsung Advanced Institute of Technology, Yongin, Gyeonggi-do 446-712, Republic of Korea

c Centre for Quantum Computation and Communication Technology, School of Physics, University of New South Wales, Sydney, NSW 2052, Australia
E-mail: michelle.simmons@unsw.edu.au
Fax: +61 815 333 2155
Tel: +61 2 9385 6313

d Centre for Quantum Computation and Communication Technology, School of Physics, University of Melbourne, Parkville, VIC 3010, Australia

e Network for Computational Nanotechnology, Purdue University, West Lafayette, Indiana 47907, USA

Abstract

Scanning tunneling microscope (STM) lithography has recently demonstrated the ultimate in device scaling with buried, conducting nanowires just a few atoms wide and the realization of single atom transistors, where a single P atom has been placed inside a transistor architecture with atomic precision accuracy. Despite the dimensions of the critical parts of these devices being defined by a small number of P atoms, the device electronic properties are influenced by the surrounding 104 to 106 Si atoms. Such effects are hard to capture with most modeling approaches, and prior to this work no theory existed that could explore the realistic size of the complete device in which both dopant disorder and placement are important. This work presents a comprehensive study of the electronic and transport properties of ultra-thin (<10 nm wide) monolayer highly P δ-doped Si (Si:P) nanowires in a fully atomistic self-consistent tight-binding approach. This atomistic approach covering large device volumes allows for a systematic study of disorder on the physical properties of the nanowires. Excellent quantitative agreement is observed with recent resistance measurements of STM-patterned nanowires [Weber et al., Science, 2012, 335, 64], confirming the presence of metallic behavior at the scaling limit. At high doping densities the channel resistance is shown to be insensitive to the exact channel dopant placement highlighting their future use as metallic interconnects. This work presents the first theoretical study of Si:P nanowires that are realistically extended and disordered, providing a strong theoretical foundation for the design and understanding of atomic-scale electronics.

Graphical abstract: Atomistic modeling of metallic nanowires in silicon

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Article information

DOI
https://doi.org/10.1039/C3NR01796F
Article type
Paper
Submitted
10 Apr 2013
Accepted
02 Jul 2013
First published
11 Jul 2013

Nanoscale, 2013,5, 8666-8674

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Atomistic modeling of metallic nanowires in silicon

H. Ryu, S. Lee, B. Weber, S. Mahapatra, L. C. L. Hollenberg, M. Y. Simmons and G. Klimeck, Nanoscale, 2013, 5, 8666 DOI: 10.1039/C3NR01796F

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