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Architectural Synthesis of Digital Signal Processing Algorithms Using “IRIS”

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Abstract

In this paper, we present the IRIS architectural synthesis system for high-performance digital signal processing. This tool allows non-specialists to automatically derive VLSI circuit architectures from high-level, algorithmic representations, and provides a quick route to silicon implementation. By incorporating a novel synthesis methodology, called the Modular Design Procedure, within the IRIS system, parameterised models of complex and innovative DSP hardware can be derived and automatically assembled to create new DSP systems. The nature of this synthesis methodology is such that designers can explore a large range of architectural alternatives, whilst considering all the architectural implications of using specific hardware to realise the circuit. The applicability of IRIS is demonstrated using the design examples of a second order Infinite Impulse Response filter and a one-dimensional Discrete Cosine Transform circuit.

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Authors and Affiliations

  1. Department of Electrical & Electronic Engineering, The Queen's, University of Belfast, Ashby Building, Stranmillis Road, Belfast, BT9 5AH, Northern Ireland

    D.W. Trainor, R.F. Woods & J.V. McCanny

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  1. D.W. Trainor
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  2. R.F. Woods
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  3. J.V. McCanny
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Trainor, D., Woods, R. & McCanny, J. Architectural Synthesis of Digital Signal Processing Algorithms Using “IRIS”. The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology 16, 41–55 (1997). https://doi.org/10.1023/A:1007908217284

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