Unravelling the Data Retention Mechanisms under Thermal Stress on 2D Memristors

Memristors based on two-dimensional (2D) materials are a rapidly growing research area due to their potential in energy-efficient in-memory processing and neuromorphic computing. However, the data retention of these emerging memristors remains sparsely investigated, despite its crucial importance to device performance and reliability. In this study, we employ kinetic Monte–Carlo simulations to investigate the data retention of a 2D planar memristor. The operation of the memristor depends on field-driven on defect migration, while thermal diffusion gradually evens the defect distribution, leading to the degradation of the high resistance state (HRS) and diminishing the ON/OFF ratio. Notably, we examine the resilience of devices based on single crystals of transition metal dichalcogenides (TMDs) in harsh environments. Specifically, our simulations show that MoS2-based devices have negligible degradation after 10 years of thermal annealing at 400 K. Furthermore, the variability in data retention lifetime across different temperatures is less than 22%, indicating a relatively consistent performance over a range of thermal conditions. We also demonstrate that device miniaturization does not compromise data retention lifetime. Moreover, employing materials with higher activation energy for defect migration can significantly enhance data retention at the cost of increased switching voltage. These findings shed light on the behavior of 2D memristors and pave the way for their optimization in practical applications.


Section 1: Device fabrication and characterization
Single crystals of MoS2 were mechanically exfoliated from bulk sources (SPI Supplies) using adhesive tape. The design of electrode patterns was accomplished using Raith Nanopatterning software, and electron beam lithography (FEI Strata DB235 SEM) was employed for their fabrication. A PMMA A9 resist was utilized at a dose of 340 μC·cm −2 , followed by a 30-second development in MIBK/IPA (1:3) solution. Metallization involved the use of an electron beam evaporator (Detech DE400) to deposit Ti/Au (10/80 nm) pads over a large area, followed by liftoff in warm acetone.
The milling patterns were designed using the NanoPatterning Visualization Engine software. The patterns involved a single-direction pixel-wide scan, precisely traced in a single sweep without any retracing. To induce memristive switching, a delivered ion linear dose of approximately 1.6 pC·μm −1 was employed with a Helium Ion Microscope. This dose was achieved with a beam current of 1.5 pA and an aperture of 10 μm. The probe size was evaluated to be less than 3 nm and was determined using the GaussFit module in ImageJ software.
The experimental setup involved testing the samples within the vacuum chamber of a customized scanning electron microscope (Zeiss EVO), operating at a base pressure of approximately 10 −5 mbar. To establish contact with the EBL-deposited pads serving as source and drain terminals, Imina miBot piezoelectric tungsten probes were employed. The data acquisition process was performed using a semiconductor analyzer (Agilent B2912A) interfaced with Keysight software.
For more comprehensive information regarding the fabrication process of the device, electrical characterization, as well as SEM, TEM, Raman, and Photoluminescence characterization, please refer to our previous study. 1 S3 Section 2: Thermal dispersion of defects in the channel Figure S1a exhibits the evolution of the defect density profile under high thermal stress of 600 K for more than four days, ultimately leading to device failure. The accumulation of defects, which determines the HRS, is dispersed by thermal stress (see Figure S1a, the five density profiles at different times from t = 0 s to t = 3.8 • 10 5 s). Consequently, there is a constant decrease in resistance. The corresponding local defect density at each time is given in Figure S1b to S1f, while the microscopic configuration is in Figure S2a to S2f.   S6 Figure S3 depicts the variations in the density and electric field profiles along the x-axis for two devices with similar conditions, except that one underwent thermal annealing at 600 K for seven days. The density of defects with spatial variation regulates the potential distribution in the channel when an external voltage is applied. 3 The thermal diffusion of defects in the channel results in a low electric field, which hinders the device from recovering the original accumulation of defects due to infrequent field-driven migration. Figure S3a and S3c show the density profiles at three distinct voltage sweep points corresponding to the same labels used in Figure 1 (I, II and IV). The electric field profiles at these points are displayed in Figure S3b and S3d.

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Section 4: Local defect densities at different stages of the resistive switching process Figure S4 show the microscopic configuration of two devices undergoing a voltage sweep between 35 V and -35 V, with a voltage ramp rate of 2.1 V/s, corresponding to points I to IV in Figure 1. We present the results for a device operating under ambient conditions and a device subjected to a seven-day annealing process at 600 K.