Design of MOS transconductors with low noise and low harmonic distortion for minimum current consumption
Introduction
Transconductors, converting voltages into currents, are basic building blocks in analog transistor circuits that appear in a wide range of applications. Very often, high requirements are set with respect to the minimum amount of noise and distortion in combination with a low current consumption. For example, in the context of A/D conversion, a major requirement is a maximal input dynamic range for the predetermined converter accuracy. In this context, the linearity of the V–I converter is becoming a bottleneck that might limit the performance of the whole system. Another example is a RF receiver front-end, where a distortion constrained maximum input sensitivity is a dominant issue. The analysis presented in this paper was done in the context of high-dynamic range A/D converters. However, it can be generically used.
The voltage-to-current characteristic of a transconductor shows a linear relationship between a certain minimum and maximum input voltage and a minimum and maximum output current. The transconductance is ideally constant between those limits. A first approximation to this characteristic is shown by a simple differential pair constructed with bipolar or MOS transistors Fig. 1(a). Because of its differential character even order harmonics are significantly suppressed, however, it is subject to a severe harmonic distortion from odd harmonics in the output current. Numerous circuit modifications that battle that problem have been proposed in literature. The most popular techniques use source degeneration (done via resistors or transistors), multiple differential pairs (connected in series or cross-coupled), or adaptive biasing; some examples are presented in [1], [2], [3], [4], [5]. With the technology scaling and the increased performance requirements, the proposed solutions also become more complex. Some of the recent state of the art implementations already use a combination of linearization techniques. For example, in [6], [7] adaptive biasing is combined with source degeneration in order to achieve a total harmonic distortion (THD) better than −75dB. In [8], [9] comparable results are obtained via resistive degeneration and local negative feedback for the input signal. In order to understand the reasons for the improved performance of the combined techniques, firstly the linearization mechanism is studied in the following section. Section 3 describes a test case that treats three well-known and one new transconductor circuits. One of the objectives of this paper is to establish a normalized evaluation procedure that would allow logical and accurate comparison of different topologies with respect to the major design parameters: signal to noise ratio (SNR), THD, power consumption and bandwidth. Such an evaluation procedure is proposed in Section 4. In Section 5, this normalization procedure is applied for the developed test case. The optimal parameterization of the circuits is investigated graphically. In Section 6, a normalized comparison for the studied circuits is made for the achievable distortion and SNR performance with respect to the required current consumption. In Section 7, simulation results for the actual transistor circuits are presented and the constraints imposed from the physical implementation are discussed. In Section 8 conclusions are drawn.
Section snippets
Distortion minimization via harmonic compensation
The operation of the V–I converter is described by the function: , where vi and i0 are respectively, the applied differential input voltage and the differential output current. For a differential circuit in equilibrium, (symmetric biasing and no excitation signal) the function f(vi) reduces to a constant: the static transconductance value gm0. The transconductor circuit is linear for a certain input voltage range, Δvi, if for that range, the dynamic transconductance gm remains very
V–I converter analytical description
Throughout the paper, four circuit's topologies are analyzed and compared. The first three are well-known and widely used circuits: single differential pair (SP), Fig. 1(a), resistor degenerated pair (RDP), Fig. 1(b), and cross-coupled pairs (CCP), Fig. 1(c). The fourth one is the proposed new circuit solution: resistor degenerated cross-coupled pairs (RCCP), Fig. 1(d). The latter combines cross-coupling (CCP) and local resistor feedback (RDP) in order to modify the function. The
Normalization of the analytical description
The normalization takes into account the physical boundaries of operation. The following normalization coefficients are used:
- •
is the current modulation depth; |m|≤1 as the output differential current could not exceed the biasing;
- •
is the effective gate-to-source overdrive voltage, where VGS, VT are the applied gate-to-source voltage and the threshold voltage of the transistors;
- •
is the input voltage normalized to the overdrive voltage;
- •
, where gm is the
Graphical interpretation of the normalized circuits’ description
In the previous section a parametric space was created for the four circuits under consideration. However, questions like: what is the optimal parameterization in each case, and how practical (implementable) is certain parameterization, are yet not answered. To give more insight, we are providing a graphical interpretation of some of the derived dependencies.
Dynamic range comparison
In the last two rows of Table 1, the normalized representations of the HD3 and the SNR are given for an optimal parametric choice. In this section those dependencies are used for a comparison of the four circuits. The evaluation is done in the following order: Firstly, the current modulation depth m is expressed as a function of the SNR. Secondly, the resulting expression is substituted in the equation for the HD3. Then the quotient I2/gm is given as a function of the HD3, SNR, the frequency
Transistor level evaluation of the dynamic range, SNR and THD
In the complex task of choosing a certain parameterization of every circuit, there always is a primary target performance determined by the application specifics. The analysis given so far was general and showed the basic trade-offs in the four circuits. In this section, firstly the non-idealities of the transistor implementation are discussed. Then the static and dynamic behavior is evaluated with simulations. The actual circuit dimensioning is done in the context of a particular application
Conclusions
A method for normalized evaluation of transconductor topologies based on MOS differential pairs was introduced. Its application on several circuit implementations was shown. The achievable dynamic range for a certain minimum current consumption was established. A new circuit solution with highly improved linearity was introduced. The results from the transistor level simulations with a state of the art technology were presented. They confirmed the superior performance of the new circuit
Sotir Ouzounov was born in Pazardjik, Bulgaria, in 1973. He received the M.Sc. degree in electrical engineering from Sofia Technical University, Bulgaria, in 1997. Since 2000, he has been working towards a Ph.D. degree in the Mixed-Signal Microelectronics group at the Eindhoven University of Technology, The Netherlands. His current research interests are in high-speed sigma-delta A/D converters and associated circuits.
References (15)
- et al.
An accurate integrated voltage-to-current converter
IEEE J. Solid-State Circuits
(1975) - et al.
Realization of a 1-V active filter using a linearization technique employing plurality of emitter-coupled pairs
IEEE J. Solid-State Circuits
(1991) - et al.
CMOS transconductance amplifiers, architectures and active filters: a tutorial
IEE Proc. Circuits, Dev. Systems.
(2000) - et al.
Low-Power CMOS Continuous-Time Filters
IEEE J. Solid-State Circuits.
(1996) - et al.
Tunable High-Frequency Gm-C filter
IEEE J. Solid State Circuits.
(2000) - et al.
A Linear MOS transconductor using source degeneration and adaptive biasing
IEEE Trans. Circuit Systems –II, Analog Digi. Signal Process.
(2001) - et al.
A CMOS transconductor with 80-dB SFDR up to 10 MHz
IEEE J. Solid-State Circuits.
(2002)
Cited by (0)
Sotir Ouzounov was born in Pazardjik, Bulgaria, in 1973. He received the M.Sc. degree in electrical engineering from Sofia Technical University, Bulgaria, in 1997. Since 2000, he has been working towards a Ph.D. degree in the Mixed-Signal Microelectronics group at the Eindhoven University of Technology, The Netherlands. His current research interests are in high-speed sigma-delta A/D converters and associated circuits.
Engel Roza joined Philips Electronics in 1965 and has been with the Philips Research Laboratories, Eindhoven, The Netherlands, since 1970. As a researcher, he has been active on radio and television receivers, optical character recognition, and digital and optical communications. He holds over 25 USA patents and has written many publications in international journals. His research interest is in particular on theory, applications and implementations of non-linear feedback loops in signal processing, e.g. phase lock loops for synchronization, decision feedback equalization, synchronous and asynchronous sigma-delta modulation and recursive bitstream conversion.
From 1985 till 1999, he headed the Digital VLSI Group in Philips Research. The group's program covered programmable architectures, architectural synthesis, embedded memories, circuit innovation and applied DSPs. Currently, he has a special assignment as Management Team Advisor for Systems on Silicon.
Johannes A. (Hans) Hegt was born on June 30, 1952 in Amsterdam, the Netherlands. He studied Electrical Engineering at the Eindhoven University of Technology (TU/e), where he graduated with honors in 1982.
From 1983 until 1986 he was an assistant at the TU/e. Since 1987, he has been a lecturer at this University, where he gives courses in the areas of switched-capacitor filter engineering, switched current filters, digital electronics, microprocessors, digital signal processing, neural networks, non-linear systems and mixed-signal systems. In 1988 he received a Ph.D. degree on synthesis of switched-capacitor filters. Since 1994 he is an Associate Professor on mixed analogue/digital circuit design. He is currently especially involved in the hardware realization of ADCs and DACs.
Gerard van der Weide was born in ‘t Harde, The Netherlands, on November 23, 1971. He received the M.Sc. degree in electrical engineering from Twente University of Technology, Enschede, The Netherlands, in 1995.
In 1995, he joined the Mixed-Signal Circuits and Systems group of Philips Research Laboratories, Eindhoven, The Netherlands, where he has been working on high-speed A/D converters and associated circuits. Currently, he is involved in the design of mixed-signal and RF circuits for wireless connectivity systems.
Arthur H.M. van Roermund was born in Delft, The Netherlands in 1951. He received the M.Sc. degree in electrical engineering in 1975 from the Delft University of Technology and the Ph.D. degree in Applied Sciences from the K.U.Leuven, Belgium, in 1987.
From 1975 to 1992 he was with Philips Research Laboratories in Eindhoven. From 1992 to 1999 he has been a full professor at the Electrical Engineering Department of Delft University of Technology, where he was chairman of the Electronics Research Group and member of the management team of DIMES. From 1992 to 1999 he has been chairman of a two-years post-graduate school for “chartered designer”. From 1992 to 1997 he has been consultant for Philips. October 1999 he joined Eindhoven University of Technology as a full professor, chairing the Mixed-signal Microelectronics Group. Since September 2002 he is also director of research of the Department of Electrical Engineering. He is chairman of the board of ProRISC, a nation-wide microelectronics platform, and senior member of the IEEE. He is member of the supervisory board of the Cobra research school. Since 2001 he is one of the three organizers of the yearly workshop on Advanced Analog Circuit Design (AACD). In 2004 he was awarded Simon Stevin Meester for his scientific and technological achievements.