A Generalizable TCAD Framework for Silicon FinFET Spin Qubit Devices with Electrical Control

We present a TCAD-based simulation framework established for quantum dot spin qubits in a silicon FinFET platform with all-electrical control of the spin state. The framework works down to 1K and consists of a two-step simulation chain, from definition of the quantum dot confinement potential with DC bias voltages, to calculation of microwave response electric field at qubit locations using small-signal AC analysis. An average field polarization vector at each quantum dot is extracted via a post-processing step. We demonstrate functionality of this approach by simulation of a recently reported two-qubit device in the form of a 5-gate silicon FinFET. The impact of the number of holes in each quantum dot on the MW response E-field polarization direction is further investigated for this device. The framework is easily generalizable to study future multi-qubit large-scale systems.


Introduction
Scalability is vital for building useful quantum computers with quantum error correction, but a tough task with respect to actual physical implementation. One promising platform to overcome this challenge is quantum dot (QD) spin qubits embedded in multi-gate silicon FinFETs [1,2]. Recently, hole spin qubits hosted by double QDs in a 5-gate silicon FinFET that can operate above 4 K have been reported [3]. The device fabrication is compatible with standard CMOS technology [4], and qubit manipulation is realized by electric dipole spin resonance (EDSR) with microwave (MW) electrical signals applied to a single gate electrode. This makes it a good candidate towards large-scale integration of spin qubit devices. To scale up the system in the near future, a simulation-aided analysis for the design of all-electrical qubit control is highly desirable. For this purpose, we developed a TCAD-based framework that can perform DC and AC simulations down to 1 K. The MW response electric field ( -field) polarization vector averaged over each QD is extracted in post-processing steps. Gate cross-talk is also included in these AC simulations by a firstorder capacitive coupling model.
We illustrate the simulation framework by taking the reported two-qubit device [3] as an example, while the generalization to multi-qubit devices is straightforward. The simulated device structure is shown in Fig. 1. In the following, we first introduce the simulation workflow and explain the AC method for MW -field polarization vector calculation, including the gate cross-talk estimation model. Then, we employ an example of single-hole QDs to show how AC simulation and post-processing work. Afterwards, we discuss the impact of the number of holes in the QDs on the averaged response -field polarization vector. * Corresponding author. E-mail address: dingq@iis.ee.ethz.ch (Q. Ding) Figure 1: Sketch of simulated 5-gate Si FinFET. (a)/(b) side/cross section view along/vertical to fin direction. MW signal (5 GHz, 12 mV amplitude) for spin qubit control is applied on gate P1.

Simulation Methodology
The entire simulation chain includes four steps, as shown in Fig. 2. To calculate the response -field polarization vectors, first, we run a quasi-stationary DC simulation to generate QDs with a specific number of holes. Quantum confinement is modeled with the density-gradient method [5,6], where a potential-like quantity Γ is derived solving an additional equation. The hole density is then obtained with = 1∕ B and f ,p = 0. Obviously, Eq. (1) is based on local thermodynamic equilibrium and Fermi-Dirac statistics, which breaks down in the SET regime of the transistor.
Options like Gibbs statistics are not available in S-Device. As a consequence, the dot charge changes continuously with gate voltage, and no tunnel barriers can be generated in the limit → 0 K. Transverse confinement is in good agreement with 2D k⋅p Schrödinger-Poisson reference calculations [5], but longitudinal confinement effects cannot be easily calibrated. Therefore, the exact density overlap between the dots remains vague. However, this is not expected to impact the AC analysis significantly.
In the second step, AC simulations are performed using the electrical small-signal analysis method [5]. This method is valid for qubit device simulation because the MW signal amplitude is usually much smaller than the applied DC bias and the device size (few hundreds of nanometers) is much smaller than the MW wavelength (centimetre range). To take the cross talk between gates into account, we introduce a simplified capacitive coupling model based on the first-order approximation. This is achieved by running two AC simulation rounds. A first round is performed with the AC signal applied on gate P1 only to extract the Y-matrix of the device. The obtained capacitance elements are then used to calculate a capacitive coupling factor V cf,X between P1 and any other gate X, based on a voltage divider circuit (see Fig. 3 (a)). Then, a second-round simulation is performed with AC signals also applied to other gates, where their AC voltage amplitudes depend on their respective coupling factors V cf,X . Fig. 3 (b) shows the results of the coupling factors in case of one hole in each QD. The coupling is strong only for gates L1 and B that are close to P1. The desired AC-response -field polarization vector is obtained based on the S-Device default output ℑ( ) after the second AC run including the gate cross talk. This extraction relies on the following relations: According to Eq. (4), the imaginary part of the displacement current response ℑ( ) (default output) is representative for the real -field response ℜ( ). Their magnitudes differ only by a scaling factor, whereas the vector directions are exactly the same. This one-to-one correspondence facilitates the subsequent calculation of a normalized field polarization vector averaged over the QD for each qubit by a postprocessing step (see the results in Sec. 3).

Simulation Results
In this section, we first present results obtained for a (1,1) charge configuration with one hole in each QD, to demonstrate the simulation workflow. Then we study the influence of an increasing hole number on the field polarization, as this parameter can be hard to determine experimentally. Fig. 4 (a) shows the hole density profile in presence of two single-hole QDs, obtained from the DC simulation. The QD hole number is calculated by integrating the hole density over a defined quantum dot volume (indicated by white dashed lines). Then, after running two-round AC simulations, the field response vector profile is calculated (see Fig. 4 (b)). Two singularities show up in the AC-response -field vector distribution due to the low response at the dot centers ((labeled by white crosses in Fig. 4 (a)). In order to assign a single field polarization vector to the threedimensional distribution, we introduce a normalized field vector averaged over the dot volume weighted by the DC hole density. It is calculated in post-processing by multiplying the hole density with each of the x/y/z-components of the field vector, then integrating the resulting quantity over the dot volume, and finally dividing the integrals by their root sum square. In this way the DC hole density acts as a weighting factor in the field extraction procedure. The calculated normalized average field polarization vectors for the QDs in a (1,1) charge configuration are shown in Fig. 4 (c). As we see, the -field vectors at both QDs are mostly polarized along the -x-direction. This observation is related to the specific location of the QD centers. For QD1, as its center is shifted towards gate B, a hotspot of the response field amplitude occurs directly in the dot region under gate P1 (see Fig. 4 (b)). This results in a larger contribution pointing along the -x axis when averaging the field vectors over the QD volume. For QD2, there is no clear hotspot, but the vertical (-x-direction) components of the field vectors in the upper part of the QD contribute more.

Impact of number of holes at QDs
To tune the hole number simultaneously at both QDs, we choose to adjust the DC bias on the plunger gates P1 and P2, while keeping the bias values on all the other gates unchanged. The required plunger gate voltages for inducing hole configurations from (1,1) to (5,5) in (QD1,QD2) are shown in Fig. 5 (a). It turns out that the relation between P-gate voltage and QD hole number is almost linear, as seen from the fitted line (red dashed) in Fig. 5 (b). From the extracted slope one can infer that, in order to accumulate one more hole on each QD, the gate bias on P1 and P2 should be reduced simultaneously by ∼ 0.1 V. This observation could be useful for future device design to improve qubit control.
The impact of an increasing hole number on the averaged field polarization vector of the QDs is shown in Fig. 6 (a). From the highlighted values in the tables we conclude that as the dot hosts more holes, the field polarization alongx-direction becomes stronger/weaker at QD1/QD2 respectively. However, the size of this effect is much smaller for QD2 than for QD1 simply because of the longer distance to the AC control gate P1. As a further post-processing step, instead of directly using the normalized field component, we define a field polarization angle, which is the angle between the extracted -field vector and the -x-axis (see the upper plot in Fig. 6 (b)). The dependence of this field polarization angle on the number of holes (see the lower plot in Fig. 6 (b)) gradually saturates with increasing hole number. A special situation occurs for the (3,3) hole configuration, where the polarization angles become almost the same at both QDs, as a consequence of the opposite trends (slopes) for QD1 and QD2.

Conclusion
A TCAD-based simulation framework for the computation of the microwave response -field polarization is demonstrated using a 5-gate FinFET hole spin qubit device. The extracted field polarization angle at the qubit location will be used for future study of the Rabi driving strength. We showed that the location of the center of the quantum dot has a strong influence on the average field polarization. The latter also depends on the number of holes in the QDs, but this effect quickly saturates with increasing hole number. His research interests include scanning probe based fabrication, spintronics and quantum computing with both superconducting qubits and spin qubits in semiconductor quantum dots. Since 2014 he is specifically interested in hole spin qubits defined in transistor like bulk finFET devices. He has co-authored over 60 peer reviewed papers and holds 9 patents.
Prof. Dr. Andreas Schenk had been heading the Nano-Device Physics Group at the Integrated Systems Laboratory (IIS) of ETH Zurich. Since 1991 he had been working as scientific adjoint at the IIS, where he habilitated in 1997 and became honorary professor in 2004. His research focus is on the physics-based modeling of nano-and optoelectronic devices. He authored and co-authored two books and more than 200 refereed papers.