A novel double-recessed 4H-SiC MESFET using scattering the electric field for high power and RF applications

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Highlights

  • A novel MESFET is presented in which the channel consists of a floating metal region.

  • The key idea is to scatter electric field lines and modify the ionization mechanism.

  • The floating metal region allows more electrons participate in carrying current.

  • The maximum output power density improved by factor 3.38.

  • The proposed structure has superior RF frequency and high electrical performances.

Abstract

In this paper, we present the unique features exhibited by a novel double-recessed 4H-SiC Metal–Semiconductor Field Effect Transistor (MESFET) in which the channel consists of a floating metal region (FMR-MESFET). The key idea in this work is to scatter the electric field lines and modify the ionization mechanism. The floating metal region allows more electrons participate in carrying current, so the optimized results show that the breakdown voltage (VBR) and the drain saturation current (IDsat) increase about 54% and 22% compared with a conventional double recessed MESFET (CDR-MESFET), respectively. Therefore the maximum output power density (Pmax) improved by factor 3.38 in comparisons with conventional one. Also, the cut-off frequency (fT) of 15 GHz and the maximum oscillation frequency (fMax) of 135 GHz for 4H-SiC FMR-MESFET is obtained compared to 13 GHz and 120 GHz for that of the CDR-MESFET and the minimum figure noise (Fmin) decreased as a result of reducing gate–drain and gate–source capacitances by about 42% and 40%, respectively. Therefore, the FMR-MESFET has superior RF frequency and high electrical performances.

Graphical abstract

A 4H-SiC MESFET with high frequency and high power performances is presented in which the channel consists of a floating metal region for scattering the electric field lines.

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Introduction

Silicon carbide (SiC) is the third generation semiconductor material [1], [2], [3] which had been developed after silicon (Si) and gallium arsenide (GaAs) materials. SiC properties include the wide band gap, very large avalanche breakdown field, high thermal conductivity, and high maximum operating temperature. With the recent progress in SiC epitaxial material and device processing, impressive performance for SiC MESFETs have been reported [4] and among its poly types, 4H-SiC has gained much attraction for applications in high power and high frequency.

A unique distinguishing feature of all power semiconductor devices is their high voltage blocking capability. The ability to support high voltages is determined by the onset of avalanche breakdown, which occur when the electric field within the device structure becomes large. In power devices, large electric fields can occur both within the interior regions of the devices where current transport takes place and at the edges of the devices. Proper design of devices requires careful attention to field distributions both at the interior and at the edges to ensure high voltage blocking capability. Since the forward voltage drop during current conduction is larger for devices with higher breakdown voltage capability, it is important to obtain a device breakdown voltage as close as possible to the intrinsic capability of the semiconductor material for optimum device performance [5] which allows the power devices to achieve a specific power density and power conversion. In addition, the MESFETs are useful for low-noise amplification, high-efficiency power generation, and high-speed logic applications, so considering of frequency parameters are important [6].

Prior researches have proposed many techniques for having better DC and RF performances including the field plate structure in the source or drain electrode, floating metal ring, p-epi guard rings, etc. [7], [8], [9], [10], [11], [12], [13], [14], [15], [16], [17], [18], [19], [20], [21].

The aim of this paper is to propose for the first time, a new 4H-SiC MESFET structure in which the channel consists of a floating metal region (FMR-MESFET). Using two-dimensional simulation, we demonstrate that this leads to improve the electrical performances of the FMR-MESFET compared to the conventional 4H-SiC double recessed MESFET (CDR-MESFET). Our simulation with ATLAS simulator [22] shows that the proposed structure has the best behavior in terms of the breakdown voltage (VBR), the drain saturation current (IDsat), the maximum output power density (Pmax), the cut-off frequency (fT), the maximum oscillation frequency (fMax), the minimum figure noise (Fmin), the gate–drain, and the gate–source capacitances.

In a conventional structure the breakdown occurs as a result of high electric field around gate corner near drain side. By locating a floating metal region (FMR) in the channel under gate, the electric field lines scatter and an extra peak generates at drain side, so the electric field crowding around gate edge near drain decreases and the VBR will improve. Also, the FMR under gate provides a better control of the thinner and thicker parts of the channel and provides higher IDsat compared with the CDR-MESFET. The VBR and IDsat are two important parameters for Pmax and have directly proportional to it, therefore Pmax is increased significantly. By employing the FMR, the area of capacitance plates decreases due to changing depletion layer, therefore the CGS and CGD will decrease too, so the fmax and fT improve and the Fmin decreases when compared to that of the conventional structure. DC and RF performances of the FMR-MESFET are studied in detail and the results are compared with the conventional structure.

Section snippets

Simulation method and device parameters

Fig. 1 shows the schematic of the proposed structure with locating a floating metal region (FMR) of nickel in channel. In order to achieve the best results, it is important to optimize the FMR region, so by changing its location along the channel and its dimensions such as length (L), width (W), and distance from the left end device (D) and spacing between the FMR and buffer׳s surface (S), the best place is achieved for situating it as follows in Table 1. Also, Schottky contact is made of

DC characteristics

In SiC MESFET, the voltage is supported across a depletion layer formed across a metal–semiconductor (Schottky barrier) interface. The electric field that exists across the depletion layer is responsible for sweeping out any mobile carriers that enter this region by the process of either space charge generation or by diffusion from the neighboring quasi-neutral regions. When the gate bias is fixed and drain voltage is increased, the potential difference between the gate and the drain end of the

Optimization of the metal location and dimensions

Based on 2-D simulation a high performance of the 4H-SiC MESFET can be obtained by optimizing location of the floating metal region in channel.

At first we assume W=0.05 µm, S=0 µm, and L=0.5 µm and calculate distance between the FMR and the left end device (D). According to Fig. 14, as the breakdown voltage occurs near the gate edge beside the drain, by suiting the FMR under gate and by moving it along the right to left end of the device, the VBR increases, because it can control the electric

Conclusion

To sum up in this article DC and RF characteristics have been analyzed at a novel MESFET (FMR-MESFET) structure. By scattering the electric field around the gate and modifying charge distribution and impact ionization, the breakdown voltage will improve. In order to modify the charge distribution, a floating metal region is located in channel under gate. Our results show that the VBR and the IDsat enhance about 54% and 22%, respectively in the proposed structure in comparison with a

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