Optimization of etching processes for the fabrication of smooth silicon carbide membranes for applications in quantum technology

Recently, it has been demonstrated that Silicon Carbide (SiC) membranes can be used in quantum sensing and MEMS applications. One of the important steps for the production of such membranes is the removal of the substrate material in order to form membranes of micron or submicron thicknesses confining the active regions of fabricated devices to the high quality, doped controlled, epitaxial layers. Moreover, optical components such as Fabry-P ´ erot cavities and photonic crystals require membranes with smooth surfaces with roughnesses down to the nanometer scale. We report on the development of doping-selective electrochemical processes for the etching of SiC and investigate the creation of such membranes, including the path towards thinner and smoother layers for improved performance. We demonstrate that the resulting roughness of membranes is substantially reduced by novel lithographic patterning and ion beam etching (IBE) procedures to RMS values down to 6 nm.


Introduction
Silicon carbide (SiC) with its excellent thermal, mechanical and physical properties is an important wide-bandgap semiconductor for many high-power electronics and high-temperature applications [1].The unique properties makes it ideal for a broad range of applications such as development of insulated-gate bipolar transistors (IGBT) [2], metal-semiconductor field-effect transistors (MESFET) [1], microelectromechanical systems (MEMS) [3], photocathodes structures [4], X-ray sensors and beam position monitors (BPMs) [5], biosensors and biocompatible integrated circuits [6].Recent observations show that SiC carbide can host point defects in the crystal lattice known as color centers, which can be efficiently used in quantum information technologies.The emerging applications of such quantum information science are in Fabry-Pérot and photonic crystal cavities [7] where quantum single-photon emitters are required [8].For MEMS, X-ray BPMs and quantum telecommunication applications, SiC membranes with thicknesses around a few to sub microns are needed with an ultra-smooth surface for optical systems.Some of these devices with complex 3D geometries (e.g.thin opening windows, free-standing and suspended structures) can only be successfully fabricated utilizing the specific etching technologyelectrochemical etching (ECE).In contrast to conventional methods of reactive ion etching (RIE), ECE allows removing a thick substrate (> 350 μm) with fast etching rate (> 2 μm/min) and doping selectivity upon keeping a good crystal quality and transport properties of the not etched epitaxial layer [9].Additionally, electrochemical etching can be performed at atmospheric pressure with low-and middle-concentrated liquid electrolyte solutions keeping the room temperatures or minor (<100 o С) heating conditions [1].
Therefore, the applied electrochemical equipment is relatively simple, as it does not require the vacuum set-ups, gas supply and plasma ignition systems.Depending on the etching parameters (operating voltage, current density, pulsed or constant current, concentration and type of electrolyte, pH level, presence or absence of surfactants, temperature, light assistance, etc.), electrochemical process can lead to creation of pores, rough or smooth surface structures.Pore formation is a typical process observed during SiC anodization and is the most reported in the literature [10][11][12][13][14]. Etching of n-type 4H-and 6H-SiC in 5-10% HF solutions mixed with ethanol at current densities 0.5-100 mA/cm 2 with UV illumination results in nine different porous morphologies [13].With increasing applied current density and/or decreasing illumination, they vary in the following order: spongy-triangular-chevron-dendriticsinuous-columnar.The porosity is not uniform in depth; it is the largest on the front and gradually decreases towards the backside.The etch rate depends on the crystallographic direction.It is twice faster for C-face than for Si-face [15].Etching of p-type SiC at low current density (≈1 mA/cm 2 ) leads to the branched microstructure, whereas it changes to filamentary with increasing the current density (30 mA/cm 2 ) [13].
In this work, we describe the production of thin ultra-smooth SiC membranes by clean room processing steps including lithography, electrochemical etching (ECE) in dark conditions, RIE and IBE with the aim to provide sufficiently low roughness values for the integration of Fabry-Pérot (with required specifications: thickness < 10 μm, roughness <10 nm) and photonic crystal cavities (thickness < 0.4 μm, roughness < a few nm).Since RIE etching time is long for removing the substrate material and the backside stopping layer thickness is not enough for protecting the frame of the membrane, ECE was used with a doping selectivity mechanism and fast etching rates (>20 μm/min).After the ECE procedure, the sample becomes rough; therefore, in order to compensate for the lost smoothness, physical ion beam etching with neutralized argon ions was performed.
We present extensive experimental results on the ECE of C-face ntype highly doped thick SiC layers in hydrofluoridic acid (HF) based electrolytes using galvanostatic (constant current) mode as described in section 2.2.The structural modifications of etched SiC membranes at different ECE phases are investigated as a function of high current densities in the range of 2-14 A/cm 2 .Moreover, a new lithography design (section 2.2.1) based on lateral etching mechanism along with ion beam smoothening methods (section 2.3) have been implemented for improving the smoothness qualities of the membranes.

Materials and methods/lithography fabrication steps
The membranes are fabricated from 100 mm 4H-SiC wafers (Cree Europe GmbH), with n-type nitrogen doped (10 18 -10 19 cm − 3 ), resistivity between 0.015 and 0.028 Ohm cm, 350 μm in thickness and epitaxially grown layers on front (Si-face) and back (C-face) by NOVA-SiC.The low nitrogen doped (10 14 cm − 3 ) epitaxial layers with two nominal thicknesses, 2 μm and 10 μm, are grown by NOVASIC on the silicon face of the substrate and a 2 μm thick epilayer with the same low concentration is grown on the carbon face.The concentration of the grown epitaxial layers are determined by means of capacitance versus voltage measurements by NOVASIC.The chosen values of 2 μm and 10 μm were grown based on the specifications needed for Fabry-Pérot and photonic crystal cavities and the fact that during the smoothening procedures the membrane thins down; thus, the initial epitaxial layer is thicker than the required thickness.A schematic cross section of the epitaxial layers stack is presented in (Fig. 1a).
The samples are cut from the 100 mm wafer into 15 × 15 mm 2 dices and spin-coated on the backside with positive-tone photoresist (AZ 12XT by Microchemicals) (Fig. 1b).We used a spin-coating recipe of velocity = 8000 rpm, acceleration = 2000 rpm, time = 10 s and soft baked for 120 s at 110 . The thickness of the resist with the above recipe is between 5.1 μm and 5.2 μm.The sample is then patterned by laser lithography with a high-resolution direct-write pattern generator (DWL66+ by Heidelberg Instruments, write head mode = 10 mm, power = 240 mW, intensity = 100%, filter = 100%), see Fig. 1c, in order to create the membrane pattern (e.g.square pattern 4 × 4 mm 2 ).The sample is then post exposure baked at 90 • C for 1 min and developed with AZ 826 MIF by Microchemicals and post development hard baked at 110 • C for 120 s (Fig. 1c).
Then, the whole backside pattern is transferred into the n-type epilayer by reactive ion etching (Fig. 1d).The etching selectivity of the RIE recipe between the SiC and AZ 12XT is 0.45.The etching was performed with "PlasmaPro 100 RIE" by Oxford instruments and the RIE recipe was optimized to reach high etching rates (≈ 230 nm/min with sample mounted on a Si wafer, ≈ 360 nm/min on an Al holder) with gas composition SF 6 : 35 sccm, O 2 : 5 sccm, gas pressure = 20 mTorr, RF power = 100 W and ICP power = 1000 W. The RF power is set by the user while the tool adjusts the DC voltage to match this power, for our case the tool adjusted the DC voltage in the range of 250-265 V. Helium was applied to the wafer backside to improve thermal contact with the liquid nitrogen-cooled electrode in order to cool down to 20 degree Celsius.The RIE step should be sufficiently long in order to completely etch through the backside low-doped layer in the lithography-patterned area and reach the high-doped substrate.The parts of the low-doped layer that is not exposed to the RIE step will be acting as a mask during the electrochemical etching as shown in Fig. 2a-d.During the electrochemical etching of SiC, holes are required at the semi-conductor/ electrolyte interface.In the case of n-type highly doped material, the depletion region is thinner and holes are injected by tunneling effects.For low-doped n-type SiC, the depletion region is larger and holes cannot be injected by tunneling effect; therefore, it can be used as a stopping layer [14].This means that ECE is a doping selective method and the membrane pattern can be efficiently controlled.
Next, the photoresist on the backside is removed by Acetone followed by a rinse in Isopropanol and spin-drying.In order to create the contacts needed during the ECE procedure for applying the constant current, the front side of the chips is coated with a 100 nm Al metallization layer by e-beam evaporation (BAK 501, by Evatec) (Fig. 1e).Prior to metallization, the native-oxide layer on the front side is removed by HF-vapor (50% HF concentration, 10 min) to achieve a good ohmic contact.The sample is then processed using the ECE procedure as described in section 2.2.

Electrochemical etching
The most critical step is the ECE, which is used to remove the 4H-SiC substrate material.The sample is mounted on a holder and inserted in a Teflon container, which is filled with HF electrolyte.A Platinum plate serves as a counter electrode (cathode) and the SiC sample with the Al-Fig.1. Lithography fabrication steps for preparation of membrane pattern for doping selective electrochemical etching.

M. Mokhtarzadeh et al.
layer contact is used as the anode.The sample holder has 4 platinum springs to contact the sample and allows for applying a current/voltage to the front side electrodes and prevents the solution from attacking the front side metallization.
The ECE with HF consists of two steps, namely the oxidation of SiC driven by holes (Eq. 1, 2) and the dissolution of formed SiO 2-x in HF (Eq.3).These processes can be described by the following chemical reactions [16][17][18]: In previous studies presented in references [18,19], it has been demonstrated that the addition of H 2 O 2 helps to enhance the oxide formation rate.
The etching process selectively stops when reaching the low-doped epilayer, which is grown on the front side, forming a membrane window.The different phases of the ECE process is illustrated in Fig. 2. As the area of the etched surface changes during the process, the progress of the etching is constantly monitored by measuring the voltage.The process is stopped when the voltage reaches a saturated value (phase 4), where the etching area is constant as well as the voltage.Therefore, the final front low-doped n-layer has been reached.
The resulting surface roughness depends on the etching parameters such as current density (J) and composition of the etch solution.An electrolyte composition of HF:H 2 O 2 :HCl (1:10:1 volume, concentrations 10%:31%:37%) was found to give low roughness and fast etching rates (Fig. 3a).Furthermore, the effect of J was investigated for this electrolyte composition.By increasing J, the etching rate rises and reaches to a saturated value of 23 μm/min.
The etching rate has been calculated using the plot in Fig. 2e considering the fact that the 350 μm thick substrate layer is etched during the ECE time between phase 1 and phase 3.In addition, to avoid high current sparking events, which can be seen as black marks on the membrane after ECE, values of J in the saturation region below 10 A/ cm 2 was considered to be safer.Inspecting the qualitative surface roughness features with respect to the etching current density using SEM analysis indicates that a value selected in the saturated regime (Fig. 3a) results in smoother surface features (Fig. 3d).
AFM analysis in tapping-mode for investigating the roughness of the membranes after electrochemical etching shows roughness values in the range of 200-400 nm depending on the etching parameter J.By selecting a value of the current density in the saturation regime, roughness values are reduced to low 200 nm (Fig. 5e).No parameter set for the ECE procedure with our conventional lithography designs was found to reduce the roughness to the required values (1-10 nm) needed for optical and quantum telecommunication applications.By inspecting the SEM and AFM images of the membranes at different locations, we observed that the edges of the membranes have a much lower roughness and a smoother morphology than the region in the lithography patterned area (Fig. 4h).
The edge effect on ECE processes has been observed previously for porous Si films [20].This feature of the membranes enlightened us to use a modified lithography design based on the smooth laterally etched edge effect.Therefore, a new method based on the lateral ECE phase was implemented that highly improves the surface smoothness.

Improved lithography design
In order to decrease the roughness, a fabrication process based on the lateral etching mechanism was developed, which involves using novel lithography designs in comparison to the conventional patterns.During the lateral etching phase, which is the last period throughout the electrochemical etching procedure, the lateral etching proceeds across the membrane from each vertically etched side.The corresponding membrane surface roughness in the laterally etched region is strongly reduced from 200 nm to 50 nm, creating a much smoother surface morphology (Fig. 4).We believe this can be attributed to the increase in the current density in the smaller edge region.In this new design, a semismooth rectangular membrane (located in the middle) of 1 mm width and unlimited length (in our sample: length = 4 mm) can be fabricated with a roughness having a root-mean-square value Rq of smaller than 50 nm.

Ion beam smoothening
Finally to achieve the demanding roughness (Rq < 10 nm), physical ion beam etching [21] and prior oxidation steps (2-4 h wet oxidation at 1000 • C + BOE) were used and succeeded to reduce the surface roughness to Rq values of 5-10 nm.
A broad ion beam of ≈100 mm diameter using an ion beam etching (IBE) tool (Ionfab 300 by Oxford Instruments) with ion energies of 750 eV -1 keV and normal incidence angle was applied.The etching rate based on the selected tool parameters was about 0.5 μm /h.Fig. 5 shows the SEM images of the SiC membrane after each IBE procedure, the pictures were taken at the same spot on the sample with the conventional lithography design and an initial roughness of Rq ≈ 200 nm.Performing IBE on the membranes with the new lithography design simply reduces the smoothening time in the laterally etched region of the membrane.The ion bombardment polishing mechanism, which is based on the slope dependent sputtering yield, causes faster etching rates of the surface protrusions and thus results in a smoother surface.With the selected etching rates of the Oxford Ionfab 300 source (≈ 0.5 μm/hour), the membrane roughness reaches a limited value of Rq = 5-6 nm after 3-4 h (with initial Rq ≈ 200 nm) and the membrane thickness is reduced by approximately 1.5-2 μm.No further smoothening was found following longer bombardment periods, due to the less differentiating sputter yield of the flattened protrusions with respect to the surface.As mentioned above, for the laterally etched regions of the membranes with the new lithography design, less IBE time is needed and accordingly less membrane thickness reduction will occur.

RIE/IBE thickness trim and spectroscopy thickness measurement
After the last IBE procedure in section 2.3, the membrane has reached the desired roughness properties required for Fabry-Pérot and photonic crystal cavities.Next we have to adjust the thickness for the desired applications.Since the IBE etching rate is too slow ≈ 0.5 μm/h, this procedure is not ideal to thin down the membranes to the specified thicknesses; in this case, the thickness can be tuned by means of RIE.Optimization of the parameters in the RIE has lead us to high etching rates of ≈ 360 nm/min = 21 μm/h (on Al sample holder).Ultimately, one of the main challenges is to be able to measure the thickness of the thin fabricated membranes (0.4-10 μm thick) using non-contact accurate methods.Therefore, we have applied a technique for measuring the thickness of the transparent membranes (smooth with low roughness) using UV-IR spectroscopy.
In order to perform this measurement, the metallization on the front  where λ is the wavelength given in μm.We replot the transmission versus wavelength curve from the UV-IR spectroscopy tool as a function of inverse effective wavelength (effective wave-number, λ eff − 1 = n λ , Fig. 6b) and then take the Fourier transformation (used zero padding for efficient interpolation); as a consequence, the peak in the FT curve corresponds to twice of the membrane thickness (Fig. 6c).

Conclusions
The structural modifications of etched SiC membrane at different ECE phases was investigated as a function of current density.The process was monitored by the voltage evolution over time, while the membrane thickness was adjusted via the implementation of low-doped stopping layers.Optimization of the ECE process parameters with high etching rates of 23 μm/min along with implementing new lithography designs based on lateral etching mechanism have lead us to semi-smooth SiC membranes with roughness values Rq ≈ 50 nm.Finally, for making an ultra-smooth membrane (Rq < 10 nm), the newly designed membrane with a semi-smooth region is then polished by using a broad ion beam for much shorter bombardment periods than using conventional lithography designs and resulted in smooth membranes with Rq ≈ 6 nm.In addition, the UV-IR spectroscopy method developed for measuring the thickness of the transparent membranes (smooth with low roughness) is of particular interest because of its simple, fast and accurate procedure.
The obtained SiC membranes are applicable for the fabrication of insitu X-ray sensors, in line beam position/ intensity monitors, quantum sensing devices as well as Fabry-Pérot and photonic crystals cavities.

Declaration of Competing Interest
The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.

Fig. 4 .Fig. 5 .
Fig. 4. (a) SEM images demonstrate the morphology difference between the vertically and laterally etched regions at the center of the membrane.(b-f) Membrane fabrication procedure with the new lithography design.(g) Schematic drawing showing the final membrane structure (5 × 5 mm 2 square) with the new lithography design, the yellow area (middle rectangular area plus the edges) is the low roughness laterally etched region and the blue area is vertically etched.(h) SEM crosssectional image in phase 3 along the edges of the membrane shows the selectivity of the two etching processes.As the etching process is continued in the last phase, the vertical etching through the bulk and the lateral etching along the surface is expanded in the edges.(For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)

Fig. 6 .
Fig. 6.Membrane thickness measurement based on UV-IR spectroscopy calculation method.(a) The fringe pattern of the optical transmission spectrum of a thin transparent film surrounded by non-absorbing media plotted versus wavelength.(b) Transmission as a function of inverse effective wavelength (effective wavenumber).(c) Fourier transformation (FT) of (b), the peak in the FT curve corresponds to twice of the membrane thickness, the outcome has been in exact agreement with membrane thickness cross-sectional SEM measurements (inset image).