The design of a hybrid DC/DC converter for LED lighting system using a single switch

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Introduction
Light-emitting diodes (LEDs) are rapidly replacing traditional light sources across various applications due to their exceptional longevity, compact size, high light efficiency per watt, eco-friendliness, and accurate colour rendering (Patakamoori et al., 2022).Numerous academic inquiries have focused on enhancing LED lamp performance, extending their lifespan, and refining controllability to boost overall efficiency.A significant area of interest within power electronics research is LED driving power generation, which plays a vital role in propelling advancements in LED applications (Fathabadi, 2016;Aganza-Torres et al., 2014;Araújo et al., 2010;Ismail et al., 2008).This has become a central focus for research endeavours.Presently, individual LED lights have limitations in providing high power outputs and significant brightness levels, posing challenges in meeting specific application requirements (Krames et al., 2007).To address this challenge, multiple LEDs are configured and grouped together to attain a wider range, enhanced luminosity, dynamic visual effects, and adaptable colour shifting as required for various applications.LED drivers can operate in either parallel or series modes, with the series mode demanding higher voltage generation and the parallel mode necessitating increased current delivery.The diverse LED connection configurations can lead to a mismatch between the load and the power supplied due to these different connection types.Leveraging its high conversion efficiency, swift dynamic response, array of topologies, and versatile feedback control methods, switching converter structures find extensive utility in powering LEDs, ensuring high efficiency, excellent performance, and reliability.
Boost converters, often utilized to elevate output voltage in response to a given input, employ a straightforward step-up mechanism with a heightened duty cycle (Haroun et al., 2014;Al-Saffar and Ismail, 2015;El Aroudi et al., 2013;Wijeratne and Moschopoulos, 2012).Nevertheless, these boost converters are hindered by parasitic elements within inductors and power semiconductors, constraining their ability to achieve substantial voltage gains.Additionally, power semiconductors contend with high voltage stress, potentially impacting the functionality of MOSFETs and IGBTs.Diodes also contribute to switching losses due to their relatively high reverse recovery current, especially under elevated current and voltage conditions.To mitigate this challenge, a flyback converter can be employed as a solution, incorporating a set-up transformer to address the issue (Fathabadi, 2016;Aganza-Torres et al., 2014;Cruz Martins and Demonti, 2002).However, the utilization of step-up transformers presents several challenges, including low operating frequencies, issues related to leakage energy, and switching transients.In response to these challenges, the adoption of high-voltage converters with significant voltage amplification has been advocated (Chen et al., 2018;Hsieh et al., 2013).Pioneering topologies employing multiple stages of multiplication have been put forth to augment voltage gain and alleviate voltage stress on power semiconductors (Araújo et al., 2010;Ismail et al., 2008;Haroun et al., 2014;Prudente et al., 2008).Within the domain of DC-to-DC power converters, several investigations (Bharatiraja et al., 2017;Banaei et al., 2014;Buck and Dc, 2017;Lin and Nian, 2014a;Zhang et al., 2018;Maroti et al., 2018) have explored the utilization of single switches to attain elevated voltage gain without requiring a high-duty cycle.Additionally, quadratic converters have been developed to enable substantial voltage gains.These converters, as detailed in (Khooban et al., 2020;Farsizadeh et al., 2020), aim to minimize instability effects within a microgrid.The controller coefficients for these systems were optimized using a specific optimization algorithm (Farsizadeh et al., 2020).Comparatively, quadratic converters like the quadratic DC-DC buck-boost converter are less efficient than traditional options like the boost converter.Additionally, the main semiconductor in these converters experiences relatively high voltage stress (Al-Saffar and Ismail, 2015).In addressing the need for versatile voltage conversions, a single-switch topology has been employed to design a quadratic DC-DC buck-boost converter, as discussed in (Zhang et al., 2018).
In the context of PV-based grid systems, the recommendation is to employ a high step-up single switch converter (Saravanan and Babu, 2017).Another viable option is the utilization of Z-source converters, providing buck-boost capabilities (El Aroudi et al., 2013).However, it's important to note that Z-source converters necessitate several passive elements such as two inductors and two capacitors, along with semiconductors possessing relatively high voltage ratings and susceptibility to switching transients.These converters aim to enhance voltage gain and reduce voltage stress across power semiconductors (de and Baptista, 2013).Additionally, an integrated buck-boost SRC with high gain has been introduced to control multi-LED loads (Kolla et al., 2022).In the domain of power factor correction (PFC) converters, an enhanced buck-boost PFC converter with a single-stage dual-output configuration has been suggested (Liu et al., 2015).On a similar note, certain topologies outlined in (Shen et al., 2011),and (Wu et al., 2019)have showcased notable step-down conversion gains through the use of interconnected inductors.However, these topologies face a notable drawback, encountering considerable switching spikes across the switch due to leakage energy present in the interconnected inductor.Authors in (D.L. E. D. Driver, 2017), have proposed an effective method to recycle this leakage energy, mitigating the switching spikes.An alternate strategy entails utilizing a soft-switched full-bridge converter in conjunction with a parallel inductor, as outlined in (Tang et al.,2019).Utilizing a secondary side transformer in this setup offers various advantages, including reduced duty cycle loss and improved efficiency under light loads.However, it does increase the number of components per lamp, leading to higher system cost and size.Cascading two converters in series without redundant switches or controllers can yield multiple topologies with distinct advantages (Wijeratne and Moschopoulos, 2012;Kadri et al., 2010).For example, a single-switch converter with low voltage drops was introduced in (Lin and Nian, 2014b).
However, a drawback is that the primary power switch experiences voltage stress equal to the converter output voltage, leading to elevated conduction losses (Lin and Nian, 2014b).In (Maroti et al., 2018), and (Oluwafemi et al., 2017) a single switch Cuk topology was employed to generate additional voltage using an extra capacitor and inductor.Nonetheless, this converter faces increased switching losses when diodes operate with higher voltages and currents.In comparison, the cascade boost converter distinguishes itself by providing higher gain across a broader range of voltage gain.Nevertheless, the main switch in this topology is subject to higher voltage drops (Chen, . et al., 2011).In various research works, different topologies for single-switch boost converters have been extensively investigated, emphasizing the importance of minimizing magnetic components, reducing weight and size, lowering conduction losses, and optimizing the cost-effectiveness of inductors.The objective is to ensure that the voltage stress on the switches remains nearly proportional to the voltage of their respective outputs.While some approaches involve integrating a classic DC-to-DC converter directly, others advocate for cascading classical converters to enhance boosting capabilities, ultimately reducing the size and cost of the converter circuit.In this context, the proposed topology, leveraging both Luo and Cuk converters, stands out by requiring only a single semiconductor power switch.Notably, it offers increased voltage static gain and minimized voltage stress across power switches and diodes compared to traditional boost topologies.Moreover, this converter can efficiently handle multiple output types and series outputs.Achieving adjustable output branches for driving varying numbers and types of LEDs can be realistically implemented using just one controller.Additionally, this work places a significant emphasis on the power converter's design aspects, which have been substantiated through rigorous simulation and experimental work.
The paper's organization is as following: Section 2 delves into the structure of the innovative combined Cuk-Luo topology.A detailed Explanation of the operational principle is outlined in Section 3. Equations in State-Space Representation are provided in Section 4, followed by analysis of Steady-State Performance in Section 5.Sections 6 and 7 encompass simulations, experimental results, and comparative analyses with related topologies.The final section, Section 8, delivers the concluding remarks.

The structure of the innovative combined Cuk-Luo topology
The schematic of the topology is displayed in Fig. 1, showcasing the integration of both the Cuk and Luo converters.Common elements include the input inductor, power switches, and input source.Every element is linked in parallel, except for the switch Q and inductor L 1 at the input.Significantly, it's important to highlight that the polarity of E. Alhani and F. Anayi the voltage at the Cuk converter's output is opposite to that at its input.The output is coupled to a dual-output termination connected to LED combinations LED1s and LED2s.Through a fusion of the advantageous features of both Luo and Cuk converters, this design achieves a reduction in the count of switches and inductors while amplifying the voltage gain.Moreover, it alleviates the voltage stress on the switch and diminishes input ripple current.

Explanation of the operational principle
The novel combined Luo-Cuk converter offers the flexibility to generate two distinct types of outputs and a serial output comprising both.To understand its operation, let's consider the scenario of a serial output with the assumption of ideal components and continuous inductor current.During one switching cycle, the combined Luo-Cuk converter undergoes two distinct operating modes, which correspond to the circuit depicted in Fig. 2(a) and (b).Fig. 3 illustrates the key waveforms during steady-state operation.The converter operating modes is elucidated as follows: During operating mode [I]: when the switch Q and D 1 are activated (as illustrated in Fig. 2(a), inductors L 1 and L 2 receive energy.
Concurrently, capacitor C 4 undergoes a discharge cycle.Diodes D 2 and D 3 are blocked by negative voltages applied to V C1 and V C4 , respectively.The voltage across the inductors can be described as follows: At t = T on = DT s , the current i L1 reaches its peak value, denoted as i L1 max.The rise in current i L1 during a switch's conduction period can be described as follows: Simultaneously, i L2 also reaches its maximum value, denoted as i L2 max.The increase in the maximum value Δi L2 is described as follows: At present, LEDs are powered by capacitors, and the current flow through switch Q is as follows: To ensure the validity of state variables, it consider the series resistance(r) of capacitor C 4 .The equations describing this mode, in line with circuit theory, are illustrate in Fig. 2(a): (6)

During operating mode [II]:
In the scenario depicted in Fig. 2(b), when switch Q is deactivated, diode D 1 undergoes reverse biasing, while diodes D 2 and D 3 transition to a forward bias state.During this period, both the power source and inductor L 1 discharge energy concurrently.
Diode D 2 provides power to the LEDs and charges capacitor C 1 .Meanwhile, capacitor C 4 is replenished through diode D 3 , and capacitor C 2 interacts with inductor L 2 .The current in inductors L 1 and L 2 experiences a linear decline, and the voltage across these inductors can be calculated using the following expressions: This implies that the current passing through diode D 3 at this moment can be expressed as follows: The decrease in current within inductor L 1 during the switch Q's off period is as follows: The current reduction occurs due to energy release from the inductor, and the rate of current decrese during this phase is as follows: For D values greater than 0.5, both the Luo and Cuk topologies are in boost mode, while for D values less than 0.5, the Luo topology is in boost mode, and the Cuk topology is in step-down mode.This mode can also be described using circuit theory equations as follows: (12)

Equations in state-space representation
A simple average model can be obtained for this open-loop step-up converter by using the average method and Eq. ( 6) and (12).In (13), X, U, and Y are state variable vectors, control variable vector, and output vector, respectively.A, B, C, and D are state matrix, input matrix, output matrix, and feed-forward matrix, respectively, which are given in the following Eq.( 13).E. Alhani and F. Anayi

Voltage gain in the proposed structure
The equation below is obtained through the application of the voltsecond balance principle to inductor L 1 : Table 1 An overview of the prototype's parameters.
Parameter Value  Using Eqs. ( 15) and ( 16), it can calculate the voltage across the capacitor C 1 and C 4 as follows: Applying the Volt-sec-balance principle for inductor, it obtains the following equation: Eq. ( 18) allows for the calculation of the capacitor voltage: By combining Eqs. ( 17),( 19), and ( 20), the steady-state voltage gain of the converetr can be calculated using the following formula: The input inductor current of the converter is obtained by setting the input power equal to the output power, expressed as follows: The mean value of i L2 is determined by the following equation.
Fig. 4 presents the graphical representation depicting the relationship between duty cycle and voltage gain for the Combined Luo-Cuk, Boost, and Cuk converters.It can be observed that the Combined Luo-Cuk converter achieves a higher voltage gain compared to both Cuk and Boost converters.Moreover, this characteristic makes it well-suited for lighting applications given its substantial gain.

Stress on device voltage and current
The voltage experienced by switch Q and diodes D 2 and D 3 during their off state is: The voltage experienced by diode D 1 when it is turned off is: The current in the power switch Q and diodes D 1 , D 2 , and D 3 can be represented as follows:

Design of inductor
The average value of the inductors and circuit under analysis is computed, ensuring a certain level of variation.This involves deter- E. Alhani and F. Anayi mining the inductance value based on the measured instantaneous voltage, V L , over a defined time period Δt L .Specifically, for inductor L 1 , the voltage V L1 is calculated using the following approach: During the initial time interval, Δt L is equal to δT, resulting in the following: The voltage V L2 for the coil L 2 can be determined using the following expression: Utilizing the second time interval, where Δt L = (1 − δ)T, The voltage across coil L 2 , denoted as V L2 , can be computed using the following approach:

Design of capacitors
As a part of the analysis, calculations are made for the values of capacitors C 1 , C 2 , and C 4 in the circuit.This is done to maintain a specific deviation ΔV c from the average value V C .The voltage vc(t)across a capacitor, in general, follows the differential Eq. ( 34).
The expression in Eq. ( 35) can be obtained using a similar approach to that employed for calculating the inductors.

Δvc
This approach allows for the determination of the capacitor's value by evaluating the instantaneous current in capacitor i c over a specific time interval Δt c .As expressed in the following equation, the current in capacitor C 1 is defined as: The initial time period produces the subsequent results: The current flowing through capacitor C 4 , denoted as I C4 , is determined using the following equation: During the initial time interval, the following results are obtained: The previous approximation cannot be utilized in this case since the current in capacitor C 2 is not consistent during the switching process.When the semiconductor is conducting, the charge supplied to capacitor ΔQ is equivalent to the area of a triangle with a height of ΔiL2 2 and a base of T/2: Assuming a constant C 2 : Thus, the variation in the load can be described as follows: So, the capacitance value for capacitor C 2 can be determined as follows: In this study, capacitors C 1 and C 2 are analysed considering steadystate conditions.However, in practical operation, the converter may encounter dynamic changes in load resistance that need to be considered.

Analysis of losses summary
To evaluate the converter's efficiency, calculating power losses is essential and is carried out as detailed in (Kazimierczuk, 2016).Initially, determining the Root Mean Square (RMS) values for inductor currents is crucial.Disregarding ripples in the inductor currents, the RMS values are equivalent to their averages.Consequently, the following equations are formulated using ( 22) and ( 23).
Subsequently, using the specified formula, it can compute the conduction losses in the inductors.
Inductors L 1 and L 2 have corresponding equivalent resistances, denoted as r L1 and r L2 .Subsequently, we proceed to compute the capacitors' conduction losses using the provided equations.
The capacitors C 1 , C 2 , C 3 , and C 4 are associated with equivalent E. Alhani and F. Anayi resistances denoted as r C1 , r C2 , r C3 , and r C4 .Additionally, it is crucial to consider power losses in diodes, necessitating the determination of forward resistance and forward voltage for each diode.We can employ the given formula to compute power losses across the diodes.
The equivalent resistance encompassing three diodes is denoted as r D1 − 3 .Furthermore, V F1− 3 represents the forward voltages for diodes D 1 -D 3 , and Io signifies the converter's output current.Lastly, we will determine power losses attributed to the power switch.Referring to (Kazimierczuk, 2016),it will analyse switching losses, accounting for both switching and conduction losses.
For switch Q, the equivalent resistance is denoted by r Q .The output capacitor is represented by the C s value of the Mosfet.The efficiency of the presented converter can be computed using the subsequent formula:   By simplifying and substituting the aforementioned equations, the efficiency of the converter can be calculated.

Simulation outcomes
To validate the theoretical analysis, simulations are conducted using the parameters outlined in Table 1 for the combined Luo-Cuk converter.Given its applicability in lighting systems with low-voltage inputs and LEDs, the simulation is configured to reflect such scenarios.Fig. 5 illustrates a representative control strategy for the combined Luo-Cuk converter.
A simulation waveform of the new combined Luo-Cuk converter is shown in Figs.6-8.A waveform of inductor i L1 is shown in Fig. 6, which also shows the output voltage of 48 volts.Based on the figure, the ripple in current flowing through inductor L 1 appears to be relatively low.A waveform of the gate driving signal for switch Q and a voltage stress waveform for switch Q and diode D 1 is shown in Fig. 7. Further, switching voltage stress roughly equals 5/8 of the switch's output voltage.According to Fig. 8, a waveform of the voltage stress applied to the diodes D 2 and D 3 has been displayed.In accordance with the theoretical analysis, the simulation results support the results in the analysis above.

Results of experimental
To evaluate the practicality of the proposed concept, a low-power hardware prototype was assembled.The experimental setup featured in Table 1 adopted the same circuit parameters as the simulation.Rather than utilizing the source of solar energy, a constant voltage power supply was employed.The input was powered by a 7 V source, and the system integrated a TMS320F28335 digital signal controller for realtime control.The output voltage was configured to 48 V for testing.Fig. 9 illustrates the physical prototype and Maintaining a duty cycle below 0.7 resulted in a voltage gain of around 6.8 and helped minimize semiconductor losses, consistent with simulation outcomes.Fig. 10(a) clearly displays the 48 V output voltage, while Fig. 10(b) exhibits a voltage waveform across capacitor C 4 .Fig. 11 provides waveforms for the experimental inductor currents and the gate drive signal of the switch, confirming the inductor's operation in Continuous Conduction Mode (CCM).Additionally, Fig. 12 presents the waveform of the voltage across switch Q.The waveform for voltage across diode D 2 and D 3 , is provided in Fig. 13 which highlights their operation of complementary with lower voltage stress compared to the output.Lastly, practical, and theoretical efficiency curves are presented in Fig. 14.
The efficiency of the converter, when operating at 6 watts, is consistently above 93.9% according to this figure.With a duty cycle of 0.65, the converter reaches its maximum efficiency, nearing 95 %.

Table 2
An analysis of the performance of similar converter topologies.
Topology resembling the proposed converter Circuit design in ( Zhang et al., 2018) Circuit design in ( Farsizadeh et al., 2020) Circuit design in ( Saravanan and Babu, 2017) Circuit design in ( Maroti et al., 2018) Circuit design in ( Banaei et al.,   Additionally, Fig. 15 demonstrates the distribution of losses in the presented converter.According to calculations based on Eqs. ( 44)-( 55), power losses in all components can be evaluated.In this converter, approximately 78 % of power loss is attributed to the three power diodes, while the switch accounts for around 14 % of power losses after the power diodes.On the other hand, the power losses from the four capacitors and two inductors are relatively small.The figure also shows power losses calculated for the experimental conditions.For instance, at a power output of 10 watts, the diodes experience an approximate power loss of 0.4 watts.

Performance comparison highlights
As depicted in Table 2, a comparison of the proposed converter's performance with similar converters is presented.The table illustrates that the proposed converter enables superior voltage gain using a single active switch and minimizes normalized voltage stress on the switch.The analysis and discussion confirm the functionality and advantages of the proposed converter.

Conclusion
This paper presents an integrated Luo-Cuk converter designed for LED lighting applications, leveraging the unique features of LED drivers and lighting systems.The converter's topology, operational principles, and steady-state characteristics are comprehensively explained.The converter exhibits dual characteristics, allowing it to attain a substantial increase in voltage by combining a Luo topology and a Cuk topology within a single input branch.This setup enables the realization of two output types simultaneously using a single switch.Additionally, the converter offers an increased voltage static gain and reduces stress on diodes and switches.Experimental results from a laboratory prototype, supported by theoretical and simulation analyses, affirm the suitability of this single-switch hybrid DC/DC converter for LED-Driving (LD) and various Lighting-Systems (LS), specifically, it is well-suited for DC lighting systems (DLS) with varying level of voltage originated by the input power source.

CRediT authorship contribution statement
Conception and design of study: E .Alhani, F. Anayi; acquisition of data: E .Alhani; analysis and/or interpretation of data: E .Alhani, F. Anayi.Drafting the manuscript: E .Alhani, F. Anayi; revising the manuscript critically for important intellectual content: E .Alhani, F. Anayi.Approval of the version of the manuscript to be published (the names of all authors must be listed): E .Alhani, F. Anayi.

Declaration of Competing Interest
The authors contributed the same in producing this manuscript.

Fig. 4 .
Fig. 4. The relationship-between the duty-cycle and voltage-gain of the combined Luo-Cuk, Boost and Cuk converters.

Fig. 6 .
Fig. 6. Results of simulation of output voltage and the input current I L1 .

Fig. 7 .Fig. 8 .
Fig. 7.The gate drive signal and voltage across the power switch Q and voltage across diode D 1 .

Fig. 12 .
Fig. 11.The gate drive signal and Currents flows through the inductor I L1 .