Graphene nanopatterns with crystallographic orientation control for nanoelectronic applications☆☆
Highlights
► Parallel processing of graphene by scanning tunneling lithography (STL) and by carbothermal etching (CTE) was compared. ► STL with a double STM tip was carried out for the first time. Feature reproducibility was demonstrated. ► Highly reproducible parallel feature formation was demonstrated for CTE. ► The location of grain boundaries expected to influence the transport through graphene nanodevices can be revealed by CTE. ► STL is suitable to produce 3D graphene nanoarchitectures from twisted layers with known layer misorientation.
Introduction
Graphene, the single atomic layer thick graphite emerged recently, as the very promising, 2D member of the nanocarbons family. Its many exciting properties like the unusual, linear dispersion relation near the Fermi level [1], high thermal conductivity (~ 5000 W m− 1 K− 1) [2] and large carrier mobility (~ 200,000 cm2 V− 1 s− 1) [3] brought graphene very quickly to the focus of the attention of many research groups working in the field of nanocarbons. A simple and very ingenious method [4] was proposed by Geim and Novoselov to prepare this material that “should not exist” [1]. A recent review of the field of graphene production enumerates several companies ready to produce tons of graphene [5]. Most of this material is produced by various applications of chemical exfoliation [6], or by using organic solvents to enhance exfoliation [7], [8]. Unfortunately even after hydrazine reduction of graphene oxide, some detrimental effects on the electronic properties may persist [9], [10]. Thus for nanoelectronic applications the best quality samples are still produced by mechanical exfoliation [4]. Various chemical vapor deposition (CVD) and epitaxial growth processes are also explored to produce high quality graphene. Graphene epitaxy on SiC is a well established method [11], [12]; however, here the first graphene layer (also called the zeroth or interfacial layer) interacts strongly with the substrate [13], [14]. CVD growth of graphene on Cu [15] is also a promising way of producing large area, high quality sheets. The transfer of the as-grown graphene films to insulating substrates — required for electronic applications — has also been successfully demonstrated [16]. Other metals like Ru [17] and Ni [18] or Ni thin films [19], [20] were used as substrates as well. In the CVD material grain boundaries [21] and misoriented layers giving rise to Moiré patterns [22] are expected to play an important role. This aspect has received surprisingly little attention during the increase of interest for graphene until very recently. We showed earlier that point defects, both in carbon nanotubes (CNTs) [23] and in single layers of graphene on SiO2 [24] produce superstructures in the scanning tunneling microscopy (STM) image, which is a clear indication of the scattering and interference of electronic waves. Therefore a strong effect is expected also in the case of nanodevices crossing grain boundaries in graphene.
Like graphene recently, fullerenes [25] and CNTs [26] generated major turns in research directions all over the world. However, the expectations regarding nanoelectronics have not yet been fulfilled, mainly because of the unsolved problem of placing at acceptable cost levels large numbers of well defined nanoobjects to a specific location with 1 nm, or better, precision. Additional difficulties arise in the case of CNTs due to the still unsolved problem of selecting a specifically requested type of nanotube (either semiconducting or metallic). Graphene, due to its sheet-like geometry offers possibilities that fullerenes and CNT are lacking:
- •
it can cover uniformly large areas with device quality material [12];
- •
post-deposition electronic structure engineering is possible [27];
- •
confinement induced gaps that allow room temperature operation can be achieved by scanning tunneling lithography (STL) [28] and tuned by the width of the graphene nanoribbon (GNR); and
- •
due to its 2D geometry, and the possibility of nanolithography by carbothermal etching (CTE) on SiO2 [29], it can be integrated with silicon devices, which allows a smooth transition from Si based to C based devices.
Field effect transistors (FETs) outperforming Si devices were already realized from graphene [12], unfortunately these FETs are not suitable for digital applications. Due to the electronic structure of graphene, these transistors do not have an off state. In order to successfully achieve the band gap engineering of graphene, nanometer wide ribbons have to be cut with a very precise crystallographic orientation [28], [29].
A crucial issue that may constitute a serious bottleneck, difficult to surpass in the development of graphene based nanoelectronics is the question of parallel lithography. Atomic scale manipulation procedures were already developed in the 1990s, when Eigler and Schweizer realized the IBM logo from Xe atoms on a Ni surface [30], later produced quantum corrals [31], and observed exciting new phenomena, like the quantum mirage [32]. The major difficulty that stopped these types of experiments from turning to technologically relevant applications was that each atom had to be manipulated one by one. This clearly shows that procedures which are able to produce simultaneously multiple features, i.e., parallel processes, are needed.
The present paper compares the two procedures suitable for the production of GNRs with controlled crystallographic orientations of the GNR edges: STL and CTE, under the aspect of parallel processing. The possibility of producing electronically decoupled graphene layers on bulk highly oriented pyrolytic graphite (HOPG) by the rotation of the GNR with respect to the HOPG is investigated. The question of grain boundaries, which will most likely affect any large scale circuit produced from graphene, will be also discussed.
Section snippets
Material and methods
For the STL experiments bulk HOPG from commercial suppliers, or few layer graphene (FLG) material produced by mechanical cleavage [4] of HOPG on a gold thin film evaporated on the polished surface of a Si wafer, was used. In order to pattern a single or few layer graphene sheets on the surface of the HOPG, or FLG — used both as material to be patterned and as conductive substrate needed to make the STM operation safe (the deeper layers were acting as a conductive substrate after the topmost
Parallel STL
The experiments for the investigation of the possibilities of parallel STL were carried out on mechanically cleaved FLG samples on Au/SiO2/Si support. An STM tip with two apexes of equal height was used, which implies that the tunnel current is simultaneously flowing through the two peaks into the sample. These so-called double-tips often form during mechanical tip preparation [34]. In the present experiment the two peaks were situated at a distance of 33.1 nm (as calculated from the distances
Outlook
Thinking further the possibilities of parallel nanopatterning also for scanning tunneling lithography, a custom designed system of isolated tips could be used in a matrix like it was used in the dot matrix printers. One tip of the matrix could be used for the operation of the feedback loop, while the other tips are used only during lithography on an atomically flat surface. Each tip should allow to be independently switched On/Off in lithographic mode, like in Fig. 6. In the present experiment
Conclusions
Scanning tunneling lithography and carbothermal etching were compared under the aspect of the possibility of parallel processing needed nanoelectronic applications. Parallel processing is of utmost importance if practically relevant nanocircuitry from graphene is targeted.
Highly reproducible features were etched by STL along chosen crystallographic directions using a double STM tip showing that parallel processing is possible. Few layer graphene (FLG) systems with twisted orientation of the
Acknowledgments
Financial support by the Hungarian Scientific Research Fund—National Office for Research and Technology (OTKA–NKTH) grant no. 67793 and OTKA grant PD-84244, as well as the Joint Korean–Hungarian Laboratory for Nanosciences (JKHLN) and the Converging Research Center Program through the Ministry of Education, Science and Technology (2010K000980) is acknowledged.
References (48)
- et al.
Solid State Commun.
(2008) - et al.
Carbon
(2007) - et al.
Carbon
(2010) - et al.
Surf. Sci.
(2002) - et al.
Nat. Materials
(2007) - et al.
Nano Lett.
(2008) - et al.
Science
(2004) Nat. Nanotech.
(2009)- et al.
Nat. Nanotech.
(2009) - et al.
Nat. Nanotech.
(2008)
Nat. Nanotech.
Nat. Naotech.
Langmuir
J. Phys. Condens. Matter
Science
Phys. Rev. B
Rev. Mod. Phys.
Science
Nat. Nanotechnol.
Nat. Mater.
Nano Lett.
Phys. Rev. B
Phys. Rev. B
Phys. Rev. B
Cited by (11)
Nanoscale profiling of multilayer graphene films on silicon carbide by a focused ion beam
2020, Diamond and Related MaterialsCitation Excerpt :Thus, the development of methods and approaches for profiling graphene films is important for creating functional electronic components. So, for example, reducing the interelectrode distance of nanoelectronic elements helps to decrease operating voltages, to reduce the overall size of devices, to increase their durability, and improve the sensitivity of sensor devices [22–25]. The use of traditional lithography processes is limited due to the difficulty of achieving spatial resolution up to 10 nm.
Preparation, characterization, and rheological properties of graphene-glycerol nanofluids
2013, Chemical Engineering JournalCitation Excerpt :It can be rolled into zero dimensional fullerenes, one dimensional nanotubes and can be stacked to form 3D graphite [5]. Since its discovery by Novoselov et al. in 2004 [6], it has opened a new research area for material science and condensed-matter physics [7–24]. Owing to high values of charge carrier mobility [7], unique transport performance [8], specific surface area [9], highest current density [10], thermal conductivity [11], and Young’s modulus [12], graphene and chemically modified graphene are promising candidates for the following applications: nanoelectronic devices [13], optical transistors [14], lithium ion batteries [15], energy storage materials [16], chemical and biological sensors [17], electromechanical devices [14], flash memory [18], nanophotonics [19], catalysis [20], capacitors [21], liquid crystals [22], solar batteries [23], micro-electro-mechanical systems, nano-electro-mechanical systems [14], polymer composites [24], and other applications.
The Atomic Structure of Graphene and Its Few-layer Counterparts
2012, Graphene: Fundamentals and emergent applicationsTransport investigation of branched graphene nanoflakes
2015, NanotechnologyElectrochemical synthesis and characterization of stable colloidal suspension of graphene using two-electrode cell system
2015, AIP Conference ProceedingsNanopatterning of suspended graphene films by local catalytic etching using atomic force microscopy equipped with an Ag-coated probe
2015, Journal of Physical Chemistry C
- ☆☆
Presented at the Diamond 2010, 21st European Conference on Diamond, Diamond- Like Materials, Carbon Nanotubes, and Nitrides, Budapest.