Regular paperCapacitorless digitally programmable fractional-order filters
Introduction
Recently, there is a growing research interest in the design of fractional-order filters due to the extra degree of freedom offered by this type of filters. More specifically, the derived frequency responses exhibit a stopband attenuation equal to −20·(n + a) dB/dec or (equivalently) −6·(n + a) dB/oct, where n and a (0 < α < 1) are the integer and fractional parts of the order of the filter, instead of −20·n dB/dec attenuation offered by their integer-order counterparts. Thus, a more precise control of the attenuation gradient is possible through the employment of fractional-order filters [1].
Fractional-order filters have been already introduced in discrete component form in [2], [3], [4], [5], [6], [7], [8], [9], [10], [11], [12], [13], [14], [15], [16], [17], [18], [19], [20]. The fractional-order behavior in the topologies in [2], [3], [4], [5], [6], [7], [8], [9], [10], [11], [12], [13], [14] has been achieved through the substitution of conventional fractional-order capacitors by suitable RC networks that approximate their behavior in a limited frequency range [21], [22], [23], [24]. It should be mentioned at this point that fractional-order capacitors are not yet commercially available [25], [26], [27]. Another technique for implementing fractional-order filters is at transfer function level, where the fractional-order transfer function is approximated by an integer-order function using appropriate expressions. The topologies in [15], [16], [17], [18], [19], [20] have been realized following the aforementioned technique. A common drawback of the topologies in [2], [3], [4], [5], [6], [7], [8], [9], [10], [11], [12], [13], [14], [15], [16], [17], [18], [19], [20] is the employment of passive resistors, leading into forms of constant-time as τ = RC and, consequently, in order to achieve accurate frequency responses, additional tuning circuitry must be employed making the design procedure somewhat complicated.
Fractional-order filters capable for being fully integrated are introduced in [28], [29], [30], [31], [32], [33], [34], [35]. The employed active elements were Operational Transconductance Amplifiers (OTAs), non-linear transconductors (S or E cells), and current-mirrors. All the above realizations are resistorless and, therefore, can be electronically tuned through appropriate dc currents. The only employed passive elements were conventional capacitors.
The contribution made in this paper is that novel fractional-order filter topologies are introduced, which are both resistorless and capacitorless. This is achieved using current-mirrors as active elements and the realization of MOS resistors is performed through the small-signal transconductance parameter (gm) of the corresponding diode-connected transistor of current-mirror, while the required capacitances are realized through the gate-source capacitances (Cgs) of the MOS transistors that form the corresponding current-mirror. According to the authors’ best knowledge, this is the first time in the literature where capacitorless continuous-time fractional-order filters are introduced.
The paper is organized as following: the design procedure for realizing fractional-order filter functions of order 1 + a (0 < α < 1) is presented in Section 2. The proposed concept is given in Section 3, where programmability issues are also discussed in this section. The realization of a programmable fractional-order filter is presented in Section 4, where its controlling scheme is also provided. The behavior of the filter is evaluated through simulation results, using the Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems (AMS) 0.35 µm CMOS process, which are presented in Section 5. Finally, Section 6 concludes the paper.
Section snippets
Transfer functions of filters
The transfer functions of various types of 1 + a (0 < α < 1) order filters are given by (1), (2), (3), (4)
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Fractional-Order Lowpass Filter (FLPF)
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Fractional-Order Highpass Filter (FHPF)
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Fractional-Order Bandpass Filter (FBPF)
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Fractional-Order Bandstop Filter (FBSF)
The magnitude and phase responses of the
Topologies of integrators
Integrator topologies using current-mirrors and capacitors are demonstrated in Fig. 2.
The corresponding lossless and lossy integrator transfer functions are given by (12), (13), respectively as
The realized time-constant (τ) is given by the formula: , where gm is the small-signal transconductance of the transistor Mn1 [37].
Considering that MOS transistors operate in the strong inversion region, the gm of the transistor is given by (14).where Kn is the
Realization of fractional-order filters of order 1 + α (0 < α < 1)
Using the integrator building blocks presented in Fig. 3, the implementation of the FBD in Fig. 1 is demonstrated in Fig. 5, where letters in circles represent net aliases in order to make the circuit easily readable.
The time-constants of integrators are given by the expression in (20) aswhere W and L are the channel width and length of the diode-connected transistors (Mn2, Mn6), (Mn3, Mn7), and (Mn4, Mn8)
Simulation results
The performance of the system in Fig. 6 will be evaluated using the Analog Design Environment of the Cadence software and the Design Kit provided by the AMS 0.35 μm CMOS process. The employed power supply voltage was VDD = 3.3 V, while IREF = 60 μA. The distribution of appropriate bias currents into the intermediate stages of the filter (i.e. summation and integration stages) has been performed through an appropriately controlled multiple output current mirror. The scheme in the case of a FLPF (a =
Conclusion
A capacitorless fractional-order filter topology, implemented using current-mirrors as active elements is introduced for the first-time in the literature. The proposed topology is generalized in the sense that fractional-order lowpass, highpass, bandpass, and bandstop filter functions can be implemented by the same topology. This is achieved through the employment of an appropriate digital logic unit which offers design flexibility and programmability. The presented simulation results confirm
Acknowledgments
This article is based upon work from COST Action CA15225, a network supported by COST (European Cooperation in Science and Technology).
Also, research described in this paper was financed by the National Sustainability Program under grant LO1401 and by the Czech Science Foundation under grant No. P102-15-21942S. For the research, infrastructure of the SIX Center was used.
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