Porous silicon for the development of capacitive microstructures

doi:10.1016/j.mee.2009.02.031

Microelectronic Engineering

Volume 86, Issue 11, November 2009, Pages 2144-2148

https://doi.org/10.1016/j.mee.2009.02.031 Get rights and content

Abstract

Macroporous silicon is developed in p-type substrates in order to extend the active surface area of the electrodes in a silicon integrated capacitive element. Some laboratory prototypes with a 3D architecture and Si/SiO₂/PolySi layers have been developed. The contribution of the surface enlargement to the final capacitance is analyzed by comparing it with a 2D planar reference capacitive device. By this method, a capacitance gain of 2400% has been obtained at low frequencies with a capacitance density of 180 nF/cm². Based on the physical microstructure, an equivalent electrical circuit of the porous capacitive element is proposed and its electrical behavior discussed.

Introduction

Porous silicon (PS) is a state of silicon derived from electrochemical processes. Its improved mechanical, optical and electrical properties, has promoted PS as a prominent material in fields such as optoelectronics, micro–electro mechanical systems (MEMS), biomedicine or powering and electronic microdevices, among others [1], [2].

Parallel to the advances in porous silicon, the downscaling of technology nodes has accelerated the miniaturization of the capacitors in dynamic random access memory (DRAMs), one of their most outstanding application fields. The progressive evolution of capacitors from stack to trench shape started with a planar 2D polysilicon–insulator–silicon (PIS) architecture in the early 80s; followed by a planar polysilicon–insulator–polysilicon (PIP) structure. In the late 1980s the PIP architectures were extended for the first time in the third dimension. Finally, from 2001 onwards metallic electrodes were introduced together with high-k dielectrics [3].

The motivation of this work is oriented to chargestorage functions, pointing towards powering of wireless microsensors. Particularly, it is focused on developing p-type silicon macropores in order to enlarge the active surface area of the electrodes in a capacitive element integrated in silicon. Consequently, an increase in the capacitance proportional to the geometrical enlargement is expected.

Section snippets

Set-up for electrochemical etching

The electrochemical etching cell is made of Teflon^® and the sealing with the wafer is ensured by two O-rings. The wafer is horizontally placed on the bottom of the cell and only the front side is in contact with the electrolyte. An aluminum thin film deposited on the back surface by physical vapor deposition (PVD) is used as the ohmic contact.

The electrical connections follow a two-electrode configuration. The electrochemical etching is galvanostatically controlled using a controllable power

Developed prototypes

The developed 3D capacitive elements consist of 20 μm-deep macropores of 3.5 μm in diameter, anodized at 13 mA/cm² for 2 h. The dielectric film is a 350 nm silicon oxide formed at 1000 °C for 16 h. The top electrode is an externally doped polysilicon layer, deposited for 12 h. This layer completely fills the interior of the pores, as shown in Fig. 4. Capacitive elements with electrode dimensions of 10 and 15 mm² are considered.

The layout of a single porous capacitive microstructure is depicted in Fig. 5

Conclusions

In contrast with the more common n-type macroporous silicon, the use of p-type macroporous silicon as a support for the development of 3D capacitive microstructures has been demonstrated.

Its natural higher pore density allows a larger capacitance value but it is in direct opposition with the robustness of the microstructure. Nevertheless, the developed p-type macroporous capacitive architecture has been proven to be more robust, especially, when the polysilicon of the top electrode completely

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Porous silicon for the development of capacitive microstructures

Abstract

Introduction

Section snippets

Set-up for electrochemical etching

Developed prototypes

Conclusions

J. Lumin.

Solid State Electron.

Microelectron. Eng.

Thin Solid Films

Microelectron. Eng.

Microelectron. Eng.