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FPGA implementation of neural network accelerator for pulse information extraction in high energy physics

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Abstract

Extracting the amplitude and time information from the shaped pulse is an important step in nuclear physics experiments. For this purpose, a neural network can be an alternative in off-line data processing. For processing the data in real time and reducing the off-line data storage required in a trigger event, we designed a customized neural network accelerator on a field programmable gate array platform to implement specific layers in a convolutional neural network. The latter is then used in the front-end electronics of the detector. With fully reconfigurable hardware, a tested neural network structure was used for accurate timing of shaped pulses common in front-end electronics. This design can handle up to four channels of pulse signals at once. The peak performance of each channel is 1.665 Giga operations per second at a working frequency of 25 MHz.

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References

  1. R. Grzywacz, Applications of digital pulse processing in nuclear spectroscopy. Nucl. Instrum. Meth. B 204, 649–659 (2003). https://doi.org/10.1016/S0168-583X(02)02146-8

    Article  Google Scholar 

  2. ALICE Collaboration, Performance of the ALICE experiment at the CERN LHC, Int. J. Mod. Phys. A 29: 1430044 (2014). https://doi.org/10.1142/S0217751X14300440

  3. ATLAS collaboration, Observation of a new particle in the search for the Standard Model Higgs boson with the ATLAS detector at the LHC, Phys. Lett. B716:1–29 (2012) https://doi.org/10.1016/j.physletb.2012.08.020

  4. N. Petrick, A.O. Hero, N.H. Clinthorne et al., A fast least-squares arrival time estimator for scintillation pulses. IEEE Trans. Nucl. Sci. 41(4), 758–761 (1994). https://doi.org/10.1109/23.322802

    Article  Google Scholar 

  5. G. Ripamonti, A. Geraci, Towards real-time digital pulse processing based on least-mean-squares algorithms. Nucl. Instrum. Meth. A 400(2–3), 447–455 (1997). https://doi.org/10.1016/S0168-9002(97)01012-7

    Article  Google Scholar 

  6. M.A. Nelson, B.D. Rooney, D.R. Dinwiddie et al., Analysis of digital timing methods with BaF2 scintillators. Nucl. Instrum. Meth. A 505(1–2), 324–327 (2003). https://doi.org/10.1016/S0168-9002(03)01078-7

    Article  Google Scholar 

  7. H.Q. Huang, X.F. Yang, W.C. Ding et al., Estimation method for parameters of overlapping nuclear pulse signal. Nucl. Sci. Tech. 28, 12 (2017). https://doi.org/10.1007/s41365-016-0161-z

    Article  Google Scholar 

  8. P.C. Ai, D. Wang, G.M. Huang et al., Timing and characterization of shaped pulses with MHz ADCs in a detector system: a comparative study and deep learning approach. J. Instrum. 14, E03001 (2019). https://doi.org/10.1088/1748-0221/14/03/P03002

    Article  Google Scholar 

  9. B. Denby, Neural networks and cellular automata in experimental high energy physics. Comput. Phys. Commun. 49(3), 429–448 (1998). https://doi.org/10.1016/0010-4655(88)90004-5

    Article  MathSciNet  Google Scholar 

  10. J. Griffiths, S. Kleinegesse, D. Saunders, et al. Pulse shape discrimination and exploration of scintillation signals using convolutional neural networks. 2018. arXiv:1611.03180

  11. MicroBooNE collaboration, Deep neural network for pixel-level electromagnetic particle identification in the MicroBooNE liquid argon time projection chamber. arXiv:1808.07269v1

  12. T. Roska, G. Bártfai, P. Szolgay et al., A digital multiprocessor hardware accelerator board for cellular neural networks: CNN-HAC. Int. J. Circuit Theory Appl. 20(5), 589–599 (1992). https://doi.org/10.1002/cta.4490200512

    Article  Google Scholar 

  13. Z. Du, R. Fasthuber, T. Chen, et al. ShiDianNao: shifting vision processing closer to the sensor. ISCA ’15: Proceedings of the 42nd Annual International Symposium on Computer Architecture, vol 43, 3, pp 92–104 (2015). https://doi.org/10.1145/2749469.2750389

  14. J. Qiu, J. Wang, S. Yao, et al. Going deeper with embedded FPGA platform for convolutional neural network. Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. ACM, (2016). https://doi.org/10.1145/2847263.2847265

  15. P. Judd, A. Delmas, S. Sharify, et al. Cnvlutin2: Ineffectual-Activation-and-Weight-Free Deep Neural Network Computing. (2017). arXiv:1705.00125

  16. A. Coates, P. Baumstarck, Q. Le, et al. Scalable learning for object detection with GPU hardware. 2009 IEEE/RSJ International Conference on Intelligent Robots and Systems, 10: 4287–4293 (2009). https://doi.org/10.1109/IROS.2009.5354084

  17. A. Boutros, S. Yazdanshenas, V. Betz, You cannot improve what you do not measure: FPGA vs. ASIC efficiency gaps for convolutional neural network inference. ACM Trans. Reconfig. Technol. Syst. 11(3), 1–23 (2018). https://doi.org/10.1145/3242898

    Article  Google Scholar 

  18. H. Torii, The ALICE PHOS calorimeter. J. Phys: Conf. Ser. 160, 012045 (2009). https://doi.org/10.1088/1742-6596/160/1/012045

    Article  Google Scholar 

  19. H. Muller, R. Pimenta, Z. Yin et al., Configurable electronics with low noise and 14-bit dynamic range for photodiode-based photon detectors. Nucl. Instrum. Meth. A 565(2), 768–783 (2006). https://doi.org/10.1016/j.nima.2006.05.246

    Article  Google Scholar 

  20. C. Farabet, C. Poulet, J.Y. Han, et al. CNP: An FPGA-based processor for Convolutional Networks. 2009 International Conference on Field Programmable Logic and Applications. https://doi.org/10.1109/FPL.2009.5272559

  21. Y. LeCun, Y. Bengio, G. Hinton, Deep learning. Nature 521, 436–444 (2015). https://doi.org/10.1038/nature14539

    Article  Google Scholar 

  22. P. Vincent, H. Larochelle, I. Lajoie et al., Stacked denoising autoencoders: learning useful representations in a deep network with a local denoising criterion. J. Mach. Learn. Res. 11(12), 3371–3408 (2010)

    MathSciNet  MATH  Google Scholar 

  23. T.C. Deng, Z.B. Hu, An ultra-low-power processor pipeline-structure. Appl. Electron. Tech. 45(6), 50–53 (2019). (in Chinese)

    Google Scholar 

  24. C. Zhang, P. Li, G.Y. Sun, et al. Optimizing FPGA-based accelerator design for deep convolutional neural networks. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA2015). 161-170 (2015). https://doi.org/10.1145/2684746.2689060

  25. P. Molchanov, S. Tyree, T. Karras, et al. Pruning convolutional neural networks for resource efficient inference. 2016. arXiv:1611.06440

  26. A. Putnam. Large-scale reconfigurable computing in a microsoft datacenter. 2014 IEEE Hot Chips 26 Symposium (HCS). https://doi.org/10.1109/HOTCHIPS.2014.7478819

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Correspondence to Peng-Cheng Ai or Dong Wang.

Additional information

This work was supported by the National Natural Science Foundation of China (Nos. 11875146 and 11505074) and National Key Research and Development Program of China (No. 2016YFE0100900).

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Chen, JL., Ai, PC., Wang, D. et al. FPGA implementation of neural network accelerator for pulse information extraction in high energy physics. NUCL SCI TECH 31, 46 (2020). https://doi.org/10.1007/s41365-020-00756-z

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  • DOI: https://doi.org/10.1007/s41365-020-00756-z

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