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Sequential multiplier with sub-linear gate complexity

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Abstract

In this article, we present a new sequential multiplier for extended binary finite fields. Like its existing counterparts, the proposed multiplier has a linear complexity in flip-flop or temporary storage requirements, but a sub-linear complexity in gate counts. For the underlying polynomial multiplication, the proposed field multiplier relies on the Horner scheme.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada

    M. Anwar Hasan

  2. ECE Department, University of Waterloo, Waterloo, Canada

    Christophe Negre

  3. LIRMM, Université Montpellier 2, Montpellier, France

    Christophe Negre

  4. Team DALI, Université de Perpignan, Perpignan, France

    Christophe Negre

Authors
  1. M. Anwar Hasan
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  2. Christophe Negre
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Correspondence to Christophe Negre.

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Hasan, M.A., Negre, C. Sequential multiplier with sub-linear gate complexity. J Cryptogr Eng 2, 91–97 (2012). https://doi.org/10.1007/s13389-012-0035-1

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  • DOI: https://doi.org/10.1007/s13389-012-0035-1

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