Abstract
The occurrence of soft-faults in digital circuits due to single event upsets (SEU) caused by particle hits has been reported in many works, and it has been claimed that, as the transistor dimensions shrink, multiple and simultaneous faults will be a common scenario in future technologies. Many techniques have been proposed to cope with these kinds of faults, most of them based on hardware or software redundancy. In this work, we present a new paradigm, which is based on signal redundancy, that is, the signal to be processed will contain a certain amount of redundancy, in such a way that, even under the occurrence of multiple faults, the final results will sustain a good resolution for some applications. A DSP microprocessor that uses the technique was prototyped, and some results are presented and compared to typical n-bits binary coded DSP microprocessor architecture, showing the advantages of using the proposed approach.
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Editor: M. Tehranipoor
Special issue on Test, Defect Tolerance and Reliability of Nanoscale Devices
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Schüler, E., Erigson, M.I. & Carro, L. Functionally Fault-tolerant DSP Microprocessor using Sigma–delta Modulated Signals. J Electron Test 23, 275–292 (2007). https://doi.org/10.1007/s10836-007-0760-z
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DOI: https://doi.org/10.1007/s10836-007-0760-z