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A Case for Chip Multiprocessors Based on the Data-Driven Multithreading Model

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Current high-end microprocessors achieve high performance as a result of adding more features and therefore increasing complexity. This paper makes the case for a Chip-Multiprocessor based on the Data-Driven Multithreading (DDM-CMP) execution model in order to overcome the limitations of current design trends. Data-Driven Multithreading (DDM) is a multithreading model that effectively hides the communication delay and synchronization overheads. DDM-CMP avoids the complexity of other designs by combining simple commodity microprocessors with a small hardware overhead for thread scheduling and an interconnection network. Preliminary experimental results show that a DDM-CMP chip of the same hardware budget as a high-end commercial microprocessor, clocked at the same frequency, achieves a speedup of up to 18.5 with a 78–81% power consumption of the commercial chip. Overall, the estimated results for the proposed DDM-CMP architecture show a significant benefit in terms of both speedup and power consumption making it an attractive architecture for future processors.

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Authors and Affiliations

  1. Department of Computer Science, University of Cyprus, Nicosia, Cyprus

    Pedro Trancoso, Paraskevas Evripidou & Kyriakos Stavrou

  2. Computer Engineering Department, Frederick Institute of Technology, Nicosia, Cyprus

    Costas Kyriacou

Authors
  1. Pedro Trancoso
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  2. Paraskevas Evripidou
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  3. Kyriakos Stavrou
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  4. Costas Kyriacou
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Correspondence to Pedro Trancoso.

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Trancoso, P., Evripidou, P., Stavrou, K. et al. A Case for Chip Multiprocessors Based on the Data-Driven Multithreading Model. Int J Parallel Prog 34, 213–235 (2006). https://doi.org/10.1007/s10766-006-0016-z

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  • DOI: https://doi.org/10.1007/s10766-006-0016-z

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