Skip to main content
SpringerLink
Log in

A power-efficient high GBW operational amplifier with its analog baseband IC implementation in 40-nm CMOS technology

  • Mixed Signal Letter
  • Published:
Analog Integrated Circuits and Signal Processing Aims and scope Submit manuscript

Abstract

This paper presented a power-efficient, relatively high voltage gain, high GBW (gain-bandwidth-product) operational amplifier (OPAMP) with a pole cancellation technique and adaptive common-mode (CM) bias circuit. A typical two-stage topology is adopted in the OPAMP prototype design while the 1st amplifier stage is in class-A mode for high voltage gain and the 2nd buffer stage is in class-AB mode for both large drive capability and additional voltage gain. In order to improve GBW and set appropriate CM voltages, an actively biased resistor–capacitor pair is inserted in between the two stages with the overall frequency response of the OPAMP nearly unaffected. Thus, a little increase in area and power consumption is traded for pole cancellation while adaptive CM bias circuits are introduced to critical current-biased transistors with the outcome of excellent CM voltage stability across all process, voltage, temperature corners. In order to verify the practicality of the proposed OPAMP, a fully programmable analog baseband IC is designed with three key blocks, including trans-impedance amplifier, LPF (low pass filter)/HPF (high pass filter)/PGA (programmable gain amplifier) hybrid bi-quads, test buffer and power supply management units, and its − 3 dB bandwidth with voltage gain is fully programmable. What is more, two class-AB power efficient PMOS-only buffers are designed to ensure input and output test adaptability. Fabricated in a 40-nm Bulk CMOS process, the chip prototype achieves an LPF’s − 3 dB bandwidth of 28–35 MHz with 3-bit digital control and 1 MHz/step programmability, an HPF’s − 3 dB bandwidth of 3–15 MHz with 3-bit digital control, and a voltage gain of 0–63 dB with 6-bit digital control and 1 dB/step programmability. With a 20 dB voltage gain, HPF corner at 3 MHz and LPF corner at 35 MHz, the measured output P−1 dB is 12.1 dBm@20 MHz, and the output IP3 is 21.1 dBm@20 MHz. The total current consumption is around 3 mA@1.5 V and 2 mA@2.5 V.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10

Data availability

The data of this manuscript will be made available on reasonable request. Data archiving is not mandated but will be made available on reasonable request.

References

  1. Lo, T. Y., & Hung, C. C. (2009). 1V CMOS Gm-C filters design and applications. Springer.

    Book  Google Scholar 

  2. Ye, L., Shi, C., Liao, H., Huang, R., & Wang, Y. (2013). Highly power-efficient active-RC filters with wide bandwidth-range using low-gain push–pull OPAMPs. IEEE Transactions on Circuits and Systems I: Regular Papers, 60(1), 95–107. https://doi.org/10.1109/TCSI.2012.2215700

    Article  MathSciNet  MATH  Google Scholar 

  3. Wang, Y., Ye, L., Liao, H., Huang, R., & Wang, Y. (2015). Highly reconfigurable analog baseband for multistandard wireless receivers in 65-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs, 62(3), 296–300. https://doi.org/10.1109/TCSII.2014.2368975

    Article  Google Scholar 

  4. Abdulaziz, M., Klumperink, E. A. M., Nauta, B., & Sjöland, H. (2019). Improving receiver close-in blocker tolerance by baseband Gm-C notch filtering. IEEE Transactions on Circuits and Systems I: Regular Papers, 66(3), 885–896. https://doi.org/10.1109/TCSI.2018.2872469

    Article  Google Scholar 

  5. Ozgun, M. T., Abdelhamid, A., & Dogan, H. (2019). A low power receiver front-end design with tunable notch filter for TX leakage and blocker suppression. IEEE Transactions on Circuits and Systems I: Regular Papers, 66(3), 1180–1191. https://doi.org/10.1109/TCSI.2018.2879040

    Article  Google Scholar 

  6. Sahu, D., Sachdev-Singh, R., Parthasarathy, H., Chatterjee, R., Ginsburg, B., Breen, D., Bhatia, K., Polarouthu, S., Edayath, V., Sharma, B., & Agarwal, M. (2019). A 45 nm 76–81 GHz CMOS radar receiver for automotive applications. In 2019 IEEE Asian solid-state circuits conference (A-SSCC) (pp. 9–12). https://doi.org/10.1109/A-SSCC47793.2019.9056907

  7. Savadi Oskooei, M. S., Masoumi, N., Kamarei, M., & Sjoland, H. (2011). A CMOS 4.35-mW +22-dBm IIP3 continuously tunable channel select filter for WLAN/WiMAX receivers. IEEE Journal of Solid-State Circuits, 46(6), 1382–1391. https://doi.org/10.1109/JSSC.2011.2120670

    Article  Google Scholar 

  8. Kulkarni, R., Kim, J., Jeon, H., Xiao, J., & Silva-Martinez, J. (2012). UHF receiver front–end: Implementation and analog baseband design considerations. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20(2), 197–210. https://doi.org/10.1109/TVLSI.2010.2096438

    Article  Google Scholar 

Download references

Acknowledgements

This work was supported in part by the National Natural Science Foundation of China (61805217).

Author information

Authors and Affiliations

  1. Institute of Microelectronics, Chinese Academy of Sciences, University of Chinese Academy of Sciences, Beijing, China

    Yu Jiang, Jing-Yu Han & Gui-Liang Guo

  2. Institute of Electronic Engineering, China Academy of Engineering Physics, Mianyang, China

    Xu Cheng & Gui-Liang Guo

  3. Microsystems and Terahertz Research Center, China Academy of Engineering Physics, Chengdu, China

    Xu Cheng & Gui-Liang Guo

Authors
  1. Yu Jiang
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Xu Cheng
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Jing-Yu Han
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Gui-Liang Guo
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Xu Cheng.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Jiang, Y., Cheng, X., Han, JY. et al. A power-efficient high GBW operational amplifier with its analog baseband IC implementation in 40-nm CMOS technology. Analog Integr Circ Sig Process 114, 475–482 (2023). https://doi.org/10.1007/s10470-023-02136-0

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10470-023-02136-0

Keywords

Search

Navigation