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Analogue CMOS prototype vision chip with prewitt edge processing

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Abstract

In this study, the design and realization of an analogue CMOS prototype vision chip with Prewitt edge processing is presented. The chip is designed with voltage and current mode and the main parts are one 16 × 16 pixel array, one pair of absolute value circuits and two transimpedance amplifiers. The technology process is TSMC 0.35 μm. The edge processing is performed parallely on pixel level. The performance of the sensor comprises a processing time of 450 ns; optical dynamic range of 53 dB; power consumption at 30 frames per second of 1.5 mW; peak signal to noise ratio of 44 dB.

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Authors and Affiliations

  1. Institute of Basic Science and Engineering, Hidalgo State University, Carretera Pachuca–Tulancingo S/N, Pachuca, Hgo, Mexico

    Jair Garcia-Lamont

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  1. Jair Garcia-Lamont
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Correspondence to Jair Garcia-Lamont.

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Garcia-Lamont, J. Analogue CMOS prototype vision chip with prewitt edge processing. Analog Integr Circ Sig Process 71, 507–514 (2012). https://doi.org/10.1007/s10470-011-9694-6

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  • DOI: https://doi.org/10.1007/s10470-011-9694-6

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