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A low-voltage low-power threshold voltage monitor for CMOS process sensing

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Abstract

In this paper a low-voltage low-power threshold voltage monitor for CMOS process sensing is presented. This circuit works in weak inversion and it can be used as an elementary circuit block for on-chip compensation of the intra-die or inter-die threshold voltage variations in low-power analog and mixed-signal SoC, since it is robust to temperature and power supply voltage variations (similar to the bandgap voltage reference). The proposed threshold voltage monitor has been successfully verified in a standard 0.35-μm n-well CMOS TSMC process. Experimental results have confirmed that the circuit generates an average reference voltage of 758 mV (very close to the typical threshold voltage when extrapolated to absolute zero) for a 950 mV power supply voltage, with a variation of 39 ppm/°C for the −20 to 80°C temperature range.

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Notes

  1. It can be not sufficient for saturation and a bigger value may be necessary to obtain it.

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Acknowledgment

The author would like to thank Prof. Dr. Sameer Sonkusale (Tufts University, MA, USA) for his helpful suggestions on this paper, and MOSIS for helping to fabricate the chips. This work was partially supported by CAPES Foundation, a research agency of the Brazilian Ministry of Education.

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  1. Universidade Federal de Itajubá, Itajubá, Brazil

    Luís Henrique de Carvalho Ferreira

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  1. Luís Henrique de Carvalho Ferreira
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Correspondence to Luís Henrique de Carvalho Ferreira.

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Ferreira, L.H.C. A low-voltage low-power threshold voltage monitor for CMOS process sensing. Analog Integr Circ Sig Process 68, 51–57 (2011). https://doi.org/10.1007/s10470-010-9572-7

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  • DOI: https://doi.org/10.1007/s10470-010-9572-7

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