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A monolithic isolation amplifier in silicon-on-insulator CMOS: Testing and applications

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Abstract

In this paper, the design and test results of a 4-channel digital isolation amplifier are presented, along with results of a prototype power converter circuit using the amplifier for voltage feedback regulation. The amplifier uses a capacitive coupling technique to transfer digital signals from input to output while preserving galvanic isolation between the two. The isolation amplifier was fabricated in a 0.5 μm Silicon-on-Sapphire (SOS) technology and uses the isolation properties of the SOS substrate to achieve more than 800 V isolation between input and output grounds. Each of the four channels can operate in excess of 100 Mbps using a differential transmission scheme to reject ground bounce transients up to 1 V/μs. The input circuit can be powered from an on-chip charge-pump to permit single supply operation. The device can be used in a wide variety of applications that require passing signals across an isolation barrier: power supplies, remote sensing, and medical and industrial applications.

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Authors and Affiliations

  1. Applied Physics Laboratory, Johns Hopkins University, Laurel, MD, 20723, USA

    Geoffrey Marcus, Kim Strohben & Steve Jaskulek

  2. Electrical and Computer Engineering, Johns Hopkins University, Baltimore, MD, 21218, USA

    Andreas G. Andreou

  3. Electrical Engineering, Yale University, New Haven, CT, 06520, USA

    Eugenio Culurciello

Authors
  1. Geoffrey Marcus
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  2. Kim Strohben
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  3. Steve Jaskulek
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  4. Andreas G. Andreou
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  5. Eugenio Culurciello
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Correspondence to Geoffrey Marcus.

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Marcus, G., Strohben, K., Jaskulek, S. et al. A monolithic isolation amplifier in silicon-on-insulator CMOS: Testing and applications. Analog Integr Circ Sig Process 49, 63–70 (2006). https://doi.org/10.1007/s10470-006-8700-x

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  • DOI: https://doi.org/10.1007/s10470-006-8700-x

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