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A systolic generation of combinations

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Abstract

A parallel algorithm for generating all combinations ofm (m fixed) items out of anyn given items in lexicographic order is presented. The computational model is a linear systolic array consisting ofm identical processing elements. This algorithm requires {ie23-1} time-steps for the {ie23-2} combinations, that is, one output at each time-step. Since all processing elements perform the same program, it is suitable for VLSI implementation. Based on mathematical induction, such an algorithm is proved to be correct.

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Lin, CJ., Tsay, JC. A systolic generation of combinations. BIT 29, 23–36 (1989). https://doi.org/10.1007/BF01932702

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  • DOI: https://doi.org/10.1007/BF01932702

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