Abstract
This article describes a project to design and build prototype analog early vision systems that are remarkably low-power, small, and fast. Three chips are described in detail. A continuous-time CMOS imager and processor chip uses a fully parallel 2-D resistive grid to find an object's position and orientation at 5000 frames/second, using only 30 milliwatts of power. A CMOS/CCD imager and processor chip does high-speed image smoothing and segmentation in a clocked, fully parallel 2-D array. And a chip that merges imperfect depth and slope data to produce an accurate depth map is under development in switched-capacitor CMOS technology.
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Wyatt, J.L., Keast, C., Seidel, M. et al. Analog VLSI systems for image acquisition and fast early vision processing. Int J Comput Vision 8, 217–230 (1992). https://doi.org/10.1007/BF00055153
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DOI: https://doi.org/10.1007/BF00055153