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Advanced Formal Verification

  • Book
  • © 2004

Overview

Editors:
  1. Rolf Drechsler

    1. University of Bremen, Germany

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Table of contents (6 chapters)

  1. Front Matter

    Pages i-xxv
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  2. What SAT-solvers Can and Cannot Do

    • Eugene Goldberg
    Pages 1-43

  3. Advancements in Mixed BDD and SAT Techniques

    • Gianpiero Cabodi, Stefano Quer
    Pages 45-76

  4. Equivalence Checking of Arithmetic Circuits

    • Dominik Stoffel, Evgeny Karibaev, Irina Kufareva, Wolfgang Kunz
    Pages 77-123

  5. Application of Property Checking and Underlying Techniques

    • Raik Brinkmann, Peer Johannsen, Klaus Winkelmann
    Pages 125-166

  6. Assertion-Based Verification

    • Claudionor Nunes Coelho Jr., Harry D. Foster
    Pages 167-204

  7. Formal Verification for Nonlinear Analog Systems: Approaches to Model and Equivalence Checking

    • Walter Hartong, Ralf Klausen, Lars Hedrich
    Pages 205-245

  8. Back Matter

    Pages 247-249
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About this book

Advanced Formal Verification shows the latest developments in the verification domain from the perspectives of the user and the developer. World leading experts describe the underlying methods of today's verification tools and describe various scenarios from industrial practice. In the first part of the book the core techniques of today's formal verification tools, such as SAT and BDDs are addressed. In addition, multipliers, which are known to be difficult, are studied. The second part gives insight in professional tools and the underlying methodology, such as property checking and assertion based verification. Finally, analog components have to be considered to cope with complete system on chip designs.

Editors and Affiliations

  • University of Bremen, Germany

    Rolf Drechsler

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