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Optimization and Design of Efficient D Flip-Flops Using QCA Technology

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Proceedings of International Conference on Recent Innovations in Computing

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 1001))

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Abstract

Digital circuits designed at a nano-scale with the growing use of technologies like quantum-dot cellular automata (QCA) are beneficial over the orthodox CMOS regime in context with certain parameters like lower power consumption, high speed and density of the device. This paper presents a literature survey of the D flip-flop designs in QCA. This is followed by proposed optimized circuits for these existing D flip-flop designs. The comparison is done between existing designs in literature and their optimized designs on the basis of parameters like number of cells used, area occupied by the cells and latency. After analysing the performance of the proposed design, it is found that it achieves performance improvements up to 62.71% over previous designs.

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Author information

Author notes

  1. Suhaib Ahmed

    Present address: Department of Computer Science and Engineering, Chitkara University Institute of Engineering and Technology, Chitkara University, Rajpura, Punjab, India

Authors and Affiliations

  1. School of Electronics and Communication Engineering, Shri Mata Vaishno Devi University, Katra, India

    Naira Nafees, Suhaib Ahmed & Vipan Kakkar

  2. Department of Electronics and Communication Engineering, Baba Ghulam Shah Badshah University, Rajouri, India

    Suhaib Ahmed

Authors
  1. Naira Nafees
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  2. Suhaib Ahmed
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  3. Vipan Kakkar
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Corresponding author

Correspondence to Suhaib Ahmed .

Editor information

Editors and Affiliations

  1. Computer Science and IT Department, Central University of Jammu, Jammu, Jammu and Kashmir, India

    Yashwant Singh

  2. Department of Computer Science, KIET Group of Institutions, Ghaziabad, Uttar Pradesh, India

    Pradeep Kumar Singh

  3. Department of Electrical Engineering, Indian Institute of Technology Patna, Patna, Bihar, India

    Maheshkumar H. Kolekar

  4. School of Artificial Intelligence, Indian Institute of Technology Delhi, New Delhi, Delhi, India

    Arpan Kumar Kar

  5. IDMEC, Polytechnic Institute of Castelo Branco, Castelo Branco, Portugal

    Paulo J. Sequeira Gonçalves

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© 2023 The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

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Nafees, N., Ahmed, S., Kakkar, V. (2023). Optimization and Design of Efficient D Flip-Flops Using QCA Technology. In: Singh, Y., Singh, P.K., Kolekar, M.H., Kar, A.K., Gonçalves, P.J.S. (eds) Proceedings of International Conference on Recent Innovations in Computing. Lecture Notes in Electrical Engineering, vol 1001. Springer, Singapore. https://doi.org/10.1007/978-981-19-9876-8_23

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