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Performance Booster Electrical Drain SiGe Nanowire TFET (EDD-SiGe-NW-TFET) with DC Analysis and Optimization

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Information and Communication Technology for Intelligent Systems

Part of the book series: Smart Innovation, Systems and Technologies ((SIST,volume 107))

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Abstract

In this paper, new concept for TFET nanowire is proposed to eliminate the issues aroused in MOSFET due to continuous scaling the device dimensions. Proposed device uses the concept of electrically doping as well as physically doping. Other than that low band gap material, silicon germanium (SiGe), is used at source region and high k dielectric is used at source–channel interface to improve the performance of the proposed structure. Simulation is done using 3D TCAD ATLAS simulator, and result validates that the proposed device is suitable for low power application. Furthermore, simulation is done for the different diameters and channel lengths for optimization.

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Acknowledgements

The authors would like to thank the Science and Engineering Research Board, Department of Science and Technology, Government of India (established through an act of parliament) for providing the financial support to carry out this work. As this work has been implemented under the project “Implementation of Sigma Delta Modulator Using Nanowire Electrically Doped Hetero Material Tunnel Field Effect Transistor (TFET) for Ultra Low Power Applications” which is funded by this board.

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Correspondence to Jyoti Patel .

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Patel, J., Suman, P., Lemtur, A., Sharma, D. (2019). Performance Booster Electrical Drain SiGe Nanowire TFET (EDD-SiGe-NW-TFET) with DC Analysis and Optimization. In: Satapathy, S., Joshi, A. (eds) Information and Communication Technology for Intelligent Systems . Smart Innovation, Systems and Technologies, vol 107. Springer, Singapore. https://doi.org/10.1007/978-981-13-1747-7_55

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