Abstract
To make production and equipment investments plans in semiconductor lines, the implementation of many variables is needed. These factors bring many changes and the result is hard to predict. It is difficult to define a standard because there are many influencing factors to make a prediction. This project established semiconductor production plans using the marketing pattern references on the past to satisfy all conditions from the factors. We come up with thesis on reasonable and standardized processes.
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References
Choi, B.K., Kim, B.H.: MES (manufacturing execution system) architecture for FMS compatible to ERP(enterprise planning system). INT. J. Computer Integrated Manufacturing 15(3) (2002)
Lee, Y.H., Kim, T.: Manufacturing cycle time reduction using balance control in the semiconductor fabrication line. Production Planning and Control 13(6), 529–540 (2002)
Lee, Y.H., Park, J., Kim, S.: Experimental study on input and bottleneck scheduling for a semiconductor fabrication line. IIE Transaction 34, 179–190 (2002)
Park, D., Han, Y., Lee, C.: Optimization of a simulation for 300mm FAB semiconductor manufacturing. In: Gavrilova, M.L., Gervasi, O., Kumar, V., Tan, C.J.K., Taniar, D., Laganá, A., Mun, Y., Choo, H. (eds.) ICCSA 2006. LNCS, vol. 3984, pp. 260–268. Springer, Heidelberg (2006)
Han, Y., Lee, C.: RRAM spare allocation in semiconductor manufacturing for yield improvement. In: Negoita, M.G., Howlett, R.J., Jain, L.C. (eds.) KES 2004. LNCS (LNAI), vol. 3215, pp. 95–102. Springer, Heidelberg (2004)
Han, Y., Park, D., Chae, S., Lee, C.: Full fabrication simulation of 300mm wafer focused on AMHS (Automated material handling systems). In: Baik, D.-K. (ed.) AsiaSim 2004. LNCS (LNAI), vol. 3398, pp. 514–520. Springer, Heidelberg (2005)
Potoradi, J., Boon, O.S., Mason, S.J.: Using simulation-based scheduling to maximize demand fulfillment in a semiconductor assembly facility. In: Proceedings of the 2002 Winter Simulation Conference, pp. 1857–1861 (2002)
Rupp, T.M., Ristic, M.: Fine planning for supply chains in semiconductor manufacture. Journal of Material Processing Technology 107, 390–397 (2000)
Vargas-Villamil, F.D., Rivera, D.E.: Multilayer optimization and scheduling using model predictive control: application to reentrant semiconductor manufacturing lines. Computers and Chemical Engineering 24, 2009–2021 (2000)
Vargas-Villamil, F.D., Rivera, D.E., Kempf, K.G.: A hierarchical approach to production control of reentrant semiconductor manufacturing lines. IEEE Transactions on Control systems Technology 11(4), 578–587 (2003)
Kim, S., Yea, S.H., Kim, B.K.: Shift scheduling for steppers in the semiconductor wafer fabrication process. IIE Transactions 34, 167–177 (2002)
Hsieh, B.W., Chen, C.H., Chang, S.C.: Scheduling semiconductor wafer fabrication by using ordinal optimization-based simulation. IEEE Transactions on Robotics and Automation 17(5), 599–608 (2001)
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Mok, Y.s., Park, D., Lee, C., Han, Y. (2011). A Production Planning Methodology for Semiconductor Manufacturing Based on Simulation and Marketing Pattern. In: Nguyen, N.T., Kim, CG., Janiak, A. (eds) Intelligent Information and Database Systems. ACIIDS 2011. Lecture Notes in Computer Science(), vol 6592. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-20042-7_37
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DOI: https://doi.org/10.1007/978-3-642-20042-7_37
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