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Multiprocessing in Embedded Systems

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Abstract

This Chapter covers multiprocessing in embedded systems. It explains the requirements of Symmetric Multiprocessing (SMP) systems and compares the approach to SMP of Intel with that of ARM. It lists ARM MPcore processors and describes the components and functions of ARM MPcore processors in support of SMP. It shows how to configure the GIC to route interrupts and demonstrates GIC programming by examples. It shows how to start up ARM MPcores and points out the need for synchronization in a SMP environment. It shows how to use the classic test-and-set or equivalent instructions to implement atomic updates and critical regions and points out their shortcomings. Then it explains the new features of ARM MPcores in support of SMP. These include LDRES/STRES instructions and memory barriers. It shows how to use the new features of ARM MPcore processors to implement spinlocks, mutexes and semaphores for process synchronization in SMP. It defines conditional spinlocks, mutexes and semaphores and shows how to use them for deadlock prevention in SMP kernels. It also covers the additional features of the ARM MMU for SMP. It presents a general methodology for adapting uniprocessor OS kernel to SMP. Then it applies the principles to develop a complete SMP_EOS for embedded systems, and it demonstrates the capabilities of the SMP_EOS system by example programs.

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Correspondence to K. C. Wang .

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Wang, K.C. (2017). Multiprocessing in Embedded Systems. In: Embedded and Real-Time Operating Systems. Springer, Cham. https://doi.org/10.1007/978-3-319-51517-5_9

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  • DOI: https://doi.org/10.1007/978-3-319-51517-5_9

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-51516-8

  • Online ISBN: 978-3-319-51517-5

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