Abstract
This paper reviewed the artificial neural network (ANN), a type of ANN called Hybrid Multilayered Perceptron (HMLP) and existing implementation of ANN on FPGA hardware. The structure of ANN and HMLP is discussed thoroughly. Past works involving HMLP had been reviewed and the HMLP had shown promising improvement over classic MLP. FPGA had seen increasing use for implementing various ANN, however ANN implementations on FPGA had encountered many challenges as discussed in this paper. After the review, it was found that, currently, no implementation of HMLP on FPGA was ever reported. Therefore a novel approach to implement the HMLP directly on FPGA is proposed at the end of the paper. The performance of the proposed FPGA-HMLP is expected to be better due to the characteristic similarity of ANN and FPGA.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Gurney, K.: An introduction to neural networks. UCL press (1997)
Kröse, B., van der Smagt, P.: An introduction to neural networks. University of Amsterdam (1993)
McCulloch, W., Pitts, W.: A logical calculus of the ideas immanent in nervous activity. Bull. Math. Biophys. 5(4), 115–133 (1943)
Mashor, M.Y.: Hybrid multilayered perceptron networks. Int. J. Syst. Sci. 31(6), 771–785 (2000)
Omondi, A.R., Rajapakse, J.C. (eds.): FPGA Implementations of Neural Networks. Springer, US (2006)
Kim, J.S., Jung, S.: Implementation of the RBF neural chip with the back-propagation algorithm for on-line learning. Appl. Soft Comput. J. 29, 233–244 (2015)
Liu, J., Liang, D.: A survey of FPGA-Based hardware implementation of ANNs. In: International Conference on Neural Networks and Brain (ICNNB) 2, pp. 915–918 (2005)
Jain, A.K., Mao, J., Mohiuddin, K.M.: Artificial neural networks: A tutorial. Computer 29(3), 31–44 (1996)
Gershenson, C.: Artificial neural networks for beginners. CoRR cs.NE/0308031, Cornell University Library (2003)
Illingworth, W.T.: Beginner’s guide to neural networks. Aerospace and Electronic Systems Magazine, IEEE 4(9), 44–49 (1989)
Osman, M.K., Mashor, M.Y., Jaafar, H.: Hybrid multilayered perceptron network trained by modified recursive prediction error-extreme learning machine for tuberculosis bacilli detection.In: Osman, N., Abas, W., Wahab, A., Ting, H.-N., (eds.) 5th Kuala Lumpur International Conference on Biomedical Engineering 2011 35, pp. 667–673, Springer, Berlin Heidelberg (2011)
Hashim, F.R.B., Soraghan, J.J., Petropoulakis, L.: Multi-classify hybrid multilayered perceptron (HMLP) network for pattern recognition applications. In: Iliadis, L., Maglogiannis, I., Papadopoulos, H., (eds.) Artificial Intelligence Applications and Innovations 381, 19–27, Springer, Berlin Heidelberg (2012)
Megat Ali, M.S.A., Jahidin, A.H., Norali, A.N.: Hybrid multilayered perceptron network for classification of bundle branch blocks. In: International Conference on Biomedical Engineering (ICoBE), Penang, pp. 149–154 (2012)
Megat Ali, M.S.A., Shaari, N.F., Julai, N., Jahidin, A.H., Amiruddin, A.I., Noor, M.Z.H., Saaid, M.F.: Robust arrhythmia classifier using hybrid multilayered perceptron network. In: IEEE 9th International Colloquium on Signal Processing and its Applications (CSPA), Kuala Lumpur, pp. 304–309 (2013)
Megat Ali, M.S.A., Rani, M.F., Jahidin, A.H., Saaid, M.F., Noor, M.Z.H.: Identification of cardiomyopathy disease using hybrid multilayered perceptron network. In: IEEE International Conference on Control System, Computing and Engineering (ICCSCE), Penang, pp. 23–27 (2013)
Amiruddin, A.I., Megat Ali, M.S.A., Saaid, M.F., Jahidin, A.H., Noor, M.Z.H.: Feature reduction and arrhythmia classification via hybrid multilayered perceptron network. In: IEEE 3rd International Conference on System Engineering and Technology (ICSET), Shah Alam, pp. 290–294 (2013)
Jusman, Y., Mat Isa, N.A., Adnan, R., Othman, N.H.: Intelligent classification of cervical pre-cancerous cells based on the FTIR spectra. Ain Shams Eng. J. 3(1), 61–70 (2012)
Yahaya, S.Z., Mat Isa, N.A.: Implementation of HMLP network with different activation function for cervical cells classification. In: IEEE 7th International Colloquium on Signal Processing and its Applications (CSPA), Penang, pp. 266–271 (2011)
Mat-Isa, N.A., Mashor, M.Y., Othman, N.H.: An automated cervical pre-cancerous diagnostic system. Artif. Intell. Med. 42(1), 1–11 (2008)
Sakim, H.A.M., Salleh, N.M., Arshad, M.R., Othman, N.H.: Evaluation of morphological features for breast cells classification using neural networks. Stud. Comput. Intell. 166, 1–9 (2009)
Sakim, H.A.M., Salleh, N.M., Othman, N.H.: Neural network inputs selection for breast cancer cells classification. Stud. Comput. Intell. 199, 1–11 (2009)
Osman, M.K., Mashor, M.Y., Jaafar, H.: Detection of tuberculosis bacilli in tissue slide images using HMLP network trained by extreme learning machine. Elektron. ir Elektrotechnika. 120(4), 69–74 (2012)
Saad, Z., Osman, M.K., Mashor, M.Y.: Modelling and forecasting of car speed using detrended inputs and hybrid multilayered percepton network. Contemp. Eng. Sci. 7(13–16), 603–610 (2014)
Mamat, W.M.F.W., Isa, N.A.M., Zamli, K.Z., Mamat, W.M.F.W.: Hybrid version of MLP neural network for transformer fault diagnosis system. In: International Symposium on Information Technology (ITSim), Kuala Lumpur, vol. 2 (2008)
Isa, N.A.M., Joret, A., Ali, A.N., Zamli, K.Z., Azizli, K.A.: Application of artificial neural networks to classify the shape of aggregate. WSEAS Trans. Syst. 4(6), 846–853 (2005)
Isa, N.A.M., Al-Batah, M.S., Zamli, K.Z., Azizli, K.A., Joret, A., Noor, N.R.M.: Suitable features selection for the HMLP and MLP networks to identify the shape of aggregate. Constr. Build. Mater. 22(3), 402–410 (2008)
Al-Batah, M.S., Mat Isa, N.A., Zamli, K.Z., Sani, Z.M., Azizli, K.A.: A novel aggregate classification technique using moment invariants and cascaded multilayered perceptron network. Int. J. Min. Process. 92(1–2), 92–102 (2009)
Sharun, S.M., Mashor, M.Y., Norhayati, M.N., Yaacob, S., Yaakob, M., Jaafar, W.N.W.: Adaptive neuro-controller based on HMLP network for InnoSAT attitude control. In: International Conference on Electrical, Control and Computer Engineering (INECCE), Kuantan, pp. 355–360 (2011)
Sharun, S.M., Mashor, M.Y., Nazid, N.M., Yaacob, S., Jaafar, W.N.W.: Innosat attitude control system based on adaptive neuro-controller. J. Inf. Commun. Technol. 10, 45–65 (2011)
Al-Batah, M.S., Mat Isa, N.A., Zamli, K.Z., Azizli, K.A.: Modified recursive least squares algorithm to train the hybrid multilayered perceptron (HMLP) network. Appl. Soft Comput. J. 10(1), 236–244 (2010)
Mat Isa, N.A., Mamat, W.M.F.W.: Clustered-hybrid multilayer perceptron network for pattern recognition application. Appl. Soft Comput. J. 11(1), 1457–1466 (2011)
Zhu, J., Sutton, P.: FPGA implementations of neural networks—a survey of a decade of progress. In: Cheung, P.Y.K., Constantinides, G., (eds.) Field Programmable Logic and Application 2778, pp. 1062–1066. Springer, Berlin Heidelberg (2003)
Ehkan, P., Zakaria, F.F., Razalli, M.S., Fuad, F.F.A., Warip, M.N.M.,Yuen, L.C.: Hardware implementation of modeling frequency coded serial communication for Eurobalise using ASK module. Appl. Mech. Mater. 548–549, 785–797 (2014)
Ehkan, P., Ann, L., Zakaria, F., Warip, M.N.: Artificial neural network for character recognition on embedded-based FPGA. In: Park, J., Pan, Y., Kim, C.S., Yang, Y. (eds.) Future Information Technology 309, pp. 281–287. Springer, Berlin Heidelberg (2014)
Misra, J., Saha, I.: Artificial neural networks in hardware: A survey of two decades of progress. Neurocomputing. 74(1–3), 239–255 (2010)
Lotrič, U., Bulić, P.: Applicability of approximate multipliers in hardware neural networks. Neurocomputing 96, 57–65 (2012)
Ahn, J.B.: Computation of backpropagation learning algorithm using neuron machine architecture. In: 5th International Conference on Computational Intelligence, Modelling and Simulation (CIMSim), Seoul, pp. 23–28 (2013)
Bohrn, M., Fujcik, L., Vrba, R.: Field programmable neural array for feed-forward neural networks. In: 36th International Conference on Telecommunications and Signal Processing (TSP), Rome, pp. 727–731 (2013)
Nedjah, N., Da Silva, R.M., De MacEdo Mourelle, L.: Compact yet efficient hardware implementation of artificial neural networks with customized topology. Expert Syst. Appl. 39(10), 9191–9206 (2012)
de Souza, A.C.D., Fernandes, M.A.C.: Parallel fixed point implementation of a radial basis function network in an FPGA. Sens. 14(10), 18223–18243 (2014)
Dondon, P., Carvalho, J., Gardere, R., Lahalle, P., Tsenov, G., Mladenov, V.: Implementation of a feed-forward Artificial Neural Network in VHDL on FPGA. In: 12th Symposium on Neural Network Applications in Electrical Engineering (NEUREL), pp. 37–40 (2015)
Brassai, S.T.: FPGA based hardware implementation of a self-organizing map. In: 18th International Conference on Intelligent Engineering Systems, pp. 101–104 (2014)
Ortega-Zamorano, F., Jerez, J.M., Juarez, G., Perez, J.O., Franco, L.: High precision FPGA implementation of neural network activation functions. In: IEEE Intelligent Embedded Systems (IES), pp. 55–60 (2014)
Jeyanthi, S., Subadra, M.: Implementation of single neuron using various activation functions with FPGA. In: International Conference on Advanced Communication Control and Computing Technologies, pp. 1126–1131 (2015)
Xie, Z.: A non-linear approximation of the sigmoid function based on FPGA. In: IEEE 5th International Conference on Advanced Computational Intelligence, Nanjing, pp. 221–223 (2012)
Bezborah, A.: A hardware architecture for training of artificial neural networks using particle swarm optimization. In: 3rd International Conference on Intelligent Systems, Modelling and Simulation, Kota Kinabalu, pp. 67–70 (2012)
Decherchi, S., Gastaldo, P., Leoncini, A., Zunino, R.: Efficient digital implementation of extreme learning machines for classification. IEEE Trans. Circuits Syst. II Express Briefs. 59(8), 496–500 (2012)
Youssef, A., Mohammed, K., Nasar, A.: A Reconfigurable, Generic and Programmable Feed Forward Neural Network Implementation in FPGA. In: 14th International Conference on Computer Modelling and Simulation (UKSim), Cambridge, Cambridgeshire, pp. 9–13 (2012)
Hariprasath, S., Prabakar, T.N.: FPGA Implementation of Multilayer Feed Forward Neural Network Architecture Using VHDL. In: International Conference on Computing, Communication and Applications (ICCCA), Dindigul, Tamilnadu (2012)
Çavuşlu, M.A., Karakuzu, C., Şahin, S., Yakut, M.: Neural network training based on FPGA with floating point number format and it’s performance. Neural Comput. Appl. 20(2), 195–202 (2011)
Lozito, G.-M., Laudani, A., Riganti-Fulginei, F., Salvini, A.: FPGA implementations of feed forward neural network by using floating point hardware accelerators. Adv. Electr. Electron. Eng. 12(1), 30–39 (2014)
Bahoura, M., Park, C.W.: FPGA-implementation of high-speed MLP neural network. In: 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Beirut, pp. 426–429 (2011)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2016 Springer International Publishing Switzerland
About this paper
Cite this paper
Ann, L.Y., Ehkan, P., Mashor, M.Y. (2016). Possibility of Hybrid Multilayered Perceptron Neural Network Realisation on FPGA and Its Challenges. In: Sulaiman, H., Othman, M., Othman, M., Rahim, Y., Pee, N. (eds) Advanced Computer and Communication Engineering Technology. Lecture Notes in Electrical Engineering, vol 362. Springer, Cham. https://doi.org/10.1007/978-3-319-24584-3_89
Download citation
DOI: https://doi.org/10.1007/978-3-319-24584-3_89
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-24582-9
Online ISBN: 978-3-319-24584-3
eBook Packages: EngineeringEngineering (R0)