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Conclusions and Recommendations

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Power-Efficient High-Speed Parallel-Sampling ADCs for Broadband Multi-carrier Systems

Part of the book series: Analog Circuits and Signal Processing ((ACSP))

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Abstract

This chapter presents the conclusions and gives recommendations for future research based on the insight gained during this study.

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References

  1. Gregers-Hansen, V., Brockett, S.M., and P.E. Cahill 2001. A stacked A-to-D converter for increased radar signal processor dynamic range. In Proceedings of the 2001 IEEE Radar Conference, 2001, pp. 169–174.

    Google Scholar 

  2. Doris, K. 2010. Data processing device comprising adc unit, U.S. Patent US20100085231 A1, 08 April 2010.

    Google Scholar 

  3. Palaskas, Y., Tsividis, Y., Prodanov, V., and V. Boccuzzi. 2004. A ‘divide and conquer’ technique for implementing wide dynamic range continuous-time filters. IEEE Journal of Solid-State Circuits 39(2): 297–307.

    Article  Google Scholar 

  4. Maheshwari, V., Serdijn, W.A., Long, J.R., and J.J. Pekarik. 2010. A 34 dB SNDR instantaneously-companding baseband SC filter for 802.11a/g WLAN receivers. In Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, 2010, pp. 92–93.

    Google Scholar 

  5. Janssen, E., Doris, K., Zanikopoulos, A., Murroni, A., van der Weide, G., Lin, Y., Alvado, L., Darthenay, F., and Y. Fregeais. 2013. An 11b 3.6GS/s time interleaved SAR ADC in 65 nm CMOS. In Solid State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International, pp. 464–465.

    Google Scholar 

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Authors and Affiliations

  1. NXP Semiconductors, Eindhoven, The Netherlands

    Yu Lin & Kostas Doris

  2. Department of Electrical Engineering, Eindhoven University of Technology, Eindhoven, The Netherlands

    Hans Hegt & Arthur H. M. van Roermund

Authors
  1. Yu Lin
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  2. Hans Hegt
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  3. Kostas Doris
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  4. Arthur H. M. van Roermund
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Corresponding author

Correspondence to Yu Lin .

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Lin, Y., Hegt, H., Doris, K., van Roermund, A.H.M. (2015). Conclusions and Recommendations. In: Power-Efficient High-Speed Parallel-Sampling ADCs for Broadband Multi-carrier Systems. Analog Circuits and Signal Processing. Springer, Cham. https://doi.org/10.1007/978-3-319-17680-2_5

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  • DOI: https://doi.org/10.1007/978-3-319-17680-2_5

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-17679-6

  • Online ISBN: 978-3-319-17680-2

  • eBook Packages: EngineeringEngineering (R0)

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