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Surface Potential Based Analytical Model for Hetero-Dielectric p-n-i-n Double-Gate Tunnel-FET

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Physics of Semiconductor Devices

Part of the book series: Environmental Science and Engineering ((ENVENG))

Abstract

In this work a piecewise Surface Potential based analytical model for a Hetero-Dielectric p-n-i-n Double Gate Tunnel FET has been developed which captures the device performance in all regions of operation i.e. Accumulation, Depletion and Inversion Region. Moreover, a comparative study among single High-k dielectric, single Low-k dielectric and Hetero-Dielectric TFET has been done. Here Vgs and Vds dependent explicit equations for surface potential have been derived which are subsequently been made to be channel length dependent. Furthermore, the electrostatic behavior of the device is studied in terms of Lateral Electric Field and Energy Band Diagram. The efficacy of the model has been validated through simulated results obtained using ATLAS device simulation software.

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Acknowledgments

Authors would like to thank Ministry of Science and Technology, Department of Science and Technology, Government of India and University of Delhi. One of the authors Upasana, would like to thank University Grants Commission, Govt. of India for providing necessary financial assistance during the course of this research work.

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Authors and Affiliations

  1. Semiconductor Device Research Laboratory, Department of Electronic Science, University of Delhi, South Campus, New Delhi, 110021, India

    Upasana, Rakhi Narang & Mridula Gupta

  2. Department of Electronics, Deen Dayal Upadhayaya College, University of Delhi, Karampura, l10015, India

    Manoj Saxena

Authors
  1. Upasana
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  2. Rakhi Narang
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  3. Manoj Saxena
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  4. Mridula Gupta
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Corresponding author

Correspondence to Mridula Gupta .

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Editors and Affiliations

  1. Amity Institute for Advanced Research and Studies (Meterials & Devices), Amity University, Noida, Uttar Pradesh, India

    V. K. Jain

  2. Amity Institute for Advanced Research and Studies (Meterials & Devices), Amity University, Noida, Uttar Pradesh, India

    Abhishek Verma

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© 2014 Springer International Publishing Switzerland

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Cite this paper

Upasana, Narang, R., Saxena, M., Gupta, M. (2014). Surface Potential Based Analytical Model for Hetero-Dielectric p-n-i-n Double-Gate Tunnel-FET. In: Jain, V., Verma, A. (eds) Physics of Semiconductor Devices. Environmental Science and Engineering(). Springer, Cham. https://doi.org/10.1007/978-3-319-03002-9_75

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