Abstract
Power Gating, PG, is a well-established technique for mitigating leakage power when a subsystem in a SoC is in some form of standby power state with clocks stopped. Register contents are lost in basic PG, requiring a reset on re-powering. State Retention Power Gating, SRPG, trades off a little more power when in standby to retain some or all of the register state values in a circuit in exchange for a more efficient and responsive wake-up and continued execution with known state. This paper addresses promising approaches to enhance PG and SRPG, which are appropriate to digital designers without the need to resort to full-custom design techniques. The aim is also to increase designer understanding of how the essentially analog circuit challenges can be abstracted for a richer set of standby power management schemes. Example implementation experience and results are described for silicon technology demonstrators developed as part of the work
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Notes
- 1.
UPF is a power-intent standard developed by Synopsys Inc., Mentor Graphics Inc. and Magma Inc. [7].
- 2.
CPF is a power-intent standard developed primarily by Cadence Inc. [8].
- 3.
Academic papers traditionally proposed both Header and Footer series transistors but in industrial usage, where on-resistance is typically the key parameter to avoid degrading performance unduly, only one power-gate device can usually be tolerated.
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Acknowledgements
Thanks are due in particular to:
Jatin Mistry, Sheng Yang, PhD researchers at the University of Southampton, UK, plus staff members Dr Matthew Swabey, Dr Reuben Wilcock and Prof Bashir Al-Hashimi.
James Myers, John Biggs, David Howard, Karthik Shivashankar and Anand Savanth at ARM Ltd, Cambridge UK
Staff at the EUROPRACTICE (E.U. FP7) programme in the IC Service organization for mini@sic MPW fabrication [9]
Synopsys Inc for the University of Southampton research sponsorship of the EDA tools and laboratory under the “Charles Babbage Award”
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Flynn, D. (2014). Power Gating and State Retention Applied to SOC Standby Power Management. In: Baschirotto, A., Makinwa, K., Harpe, P. (eds) Frequency References, Power Management for SoC, and Smart Wireless Interfaces. Springer, Cham. https://doi.org/10.1007/978-3-319-01080-9_12
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DOI: https://doi.org/10.1007/978-3-319-01080-9_12
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