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Optimizing ECC Implementations Based on SoC-FPGA with Hardware Scheduling and Full Pipeline Multiplier for IoT Platforms

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Intelligence of Things: Technologies and Applications (ICIT 2023)

Part of the book series: Lecture Notes on Data Engineering and Communications Technologies ((LNDECT,volume 187))

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Abstract

In the context of Industry 4.0 and the Internet of Things (IoT), it is crucial to ensure the safety and security of electronic devices. This paper proposes a design using the SoC-FPGA platform to enhance IoT device security. The design combines a powerful ARM processor with customizable IP cores on the FPGA, resulting in high processing speed. The co-processor performs asymmetric encryption using Elliptic Curve Cryptography (ECC) with the SECP256K1 curve. The main operation is point multiplication, with point addition and doubling as secondary operations. The results demonstrate high efficiency, with the ECC core operating at 30 MHz and point addition and doubling taking around 37 microseconds. The point multiplication operation can be processed in approximately 17 ms. This design provides a secure and efficient solution for enhancing IoT device and connection security.

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Acknowledgment

This research is funded by University of Science, VNU-HCM under grant number TVT 2022-04.

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Correspondence to Tuan-Kiet Tran .

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Tran, TK., Dang, TP., Hoang, TT., Pham, CK., Huynh, HT. (2023). Optimizing ECC Implementations Based on SoC-FPGA with Hardware Scheduling and Full Pipeline Multiplier for IoT Platforms. In: Dao, NN., Thinh, T.N., Nguyen, N.T. (eds) Intelligence of Things: Technologies and Applications. ICIT 2023. Lecture Notes on Data Engineering and Communications Technologies, vol 187. Springer, Cham. https://doi.org/10.1007/978-3-031-46573-4_28

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