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Logic Synthesis for VLSI-Based Combined Finite State Machines

Synthesis Targeting ASICs, CPLDs and FPGAs

  • Book
  • © 2022

Overview

Authors:
  1. Alexander Barkalov

    1. Institute of Metrology, Electronics and Computer Science, University of Zielona Góra, Zielona Gora, Poland

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  2. Larysa Titarenko

    1. Institute of Metrology, Electronics and Computer Science, University of Zielona Góra, Zielona Gora, Poland

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  3. Kamil Mielcarek

    1. Institute of Metrology, Electronics and Computer Science, University of Zielona Góra, Zielona Gora, Poland

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  4. Małgorzata Mazurkiewicz

    1. Institute of Control and Computation Engineering, University of Zielona Góra, Zielona Gora, Poland

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  5. Elżbieta Kawecka

    1. Department of Information Systems and Computer Networks, Faculty of Technology, The Jacob of Paradies University, Gorzów Wielkopolski, Poland

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  • Presents methods for the hardware optimization of circuits of combined finite state machines (CFSMs)
  • Proposes synthesis methods targeting three following types of VLSI chips: ASICs, CPLDs and FPGAs
  • Develops some synthesis methods which allow reducing the hardware amount for CFSM circuits

Part of the book series: Lecture Notes in Electrical Engineering (LNEE, volume 922)

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Table of contents (8 chapters)

  1. Front Matter

    Pages i-xv
    Download chapter PDF

  2. Control Algorithms and Finite State Machines

    • Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka
    Pages 1-32

  3. VLSI-based Logic Synthesis

    • Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka
    Pages 33-76

  4. ASIC-based Synthesis of CFSMs

    • Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka
    Pages 77-110

  5. Optimization of ASIC-based CFSMs

    • Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka
    Pages 111-143

  6. Homogenous CPLD-Based Synthesis  of CFSMs

    • Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka
    Pages 145-178

  7. Heterogeneous CPLD-based Synthesis of CFSMs

    • Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka
    Pages 179-214

  8. CPLD-Based Synthesis with Transformation of State Codes

    • Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka
    Pages 215-248

  9. FPGA-Based Synthesis of CFSMs

    • Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka
    Pages 249-286

  10. Back Matter

    Pages 287-291
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Keywords

About this book

The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs. The book contains some original synthesis and optimization methods targeting hardware reduction in VLSI-based CFSM circuits. These methods take into account the peculiarities of both a CFSM model and a VLSI chip in use. The optimization is achieved due to combining classical optimization methods with new methods proposed in this book. These new methods are a mixed encoding of collections of microoperations and a twofold state assignment in CFSMs. All proposed methods target reducing the numbers of arguments in systems of Boolean functions representing CFSM circuits. Also, we propose to use classes of pseudoequivalent states of Moore FSMs to reduce the number of product terms in these systems.The book includes a lot of examples which contributes to a better understanding of the features of the synthesis methods under consideration.   


This is the first book entirely devoted to the problems associated with synthesis and optimization of VLSI-based CFSMs. We hope that the book will be interesting and useful for students and PhD students in the area of Computer Science, as well as for designers of various digital systems. We think that proposed CFSM models enlarge the class of models applied for implementation of control units with modern VLSI chips. 


 



Authors and Affiliations

  • Institute of Metrology, Electronics and Computer Science, University of Zielona Góra, Zielona Gora, Poland

    Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek

  • Institute of Control and Computation Engineering, University of Zielona Góra, Zielona Gora, Poland

    Małgorzata Mazurkiewicz

  • Department of Information Systems and Computer Networks, Faculty of Technology, The Jacob of Paradies University, Gorzów Wielkopolski, Poland

    Elżbieta Kawecka

Bibliographic Information

  • Book Title: Logic Synthesis for VLSI-Based Combined Finite State Machines

  • Book Subtitle: Synthesis Targeting ASICs, CPLDs and FPGAs

  • Authors: Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka

  • Series Title: Lecture Notes in Electrical Engineering

  • DOI: https://doi.org/10.1007/978-3-031-16027-1

  • Publisher: Springer Cham

  • eBook Packages: Computer Science, Computer Science (R0)

  • Copyright Information: The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerland AG 2022

  • Hardcover ISBN: 978-3-031-16026-4Published: 26 November 2022

  • Softcover ISBN: 978-3-031-16029-5Published: 26 November 2023

  • eBook ISBN: 978-3-031-16027-1Published: 24 November 2022

  • Series ISSN: 1876-1100

  • Series E-ISSN: 1876-1119

  • Edition Number: 1

  • Number of Pages: XV, 291

  • Number of Illustrations: 270 b/w illustrations

  • Topics: Circuits and Systems, Control and Systems Theory

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