Abstract
Data compression has been a subject of academic research and industrial development for decades, and has been widely deployed in long-haul communication networks and archival storage systems for many years. Conversely, it has only relatively recently been considered a reasonable possibility in the processor memory hierarchy. Over the past decade, operating systems and a few commercial hardware implementations have begun using compression to increase the capacity of main memory. With the semiconductor scaling trends that continue to widen the gap between processor performance and memory access latency and bandwidth, the potential for compression to increase the effective cache capacity, improve off-chip bandwidth, and increase memory capacity has significant commercial appeal.
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© 2016 Springer Nature Switzerland AG
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Sardashti, S., Arelakis, A., Stenström, P., Wood, D. (2016). Concluding Remarks. In: A Primer on Compression in the Memory Hierarchy. Synthesis Lectures on Computer Architecture. Springer, Cham. https://doi.org/10.1007/978-3-031-01751-3_6
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DOI: https://doi.org/10.1007/978-3-031-01751-3_6
Publisher Name: Springer, Cham
Print ISBN: 978-3-031-00623-4
Online ISBN: 978-3-031-01751-3
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