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Interconnect Processing: Integration, Dielectrics, Metals

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Springer Handbook of Semiconductor Devices

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Abstract

This chapter covers integration, performance, and three main process sectors concerning back-end-of-line (BEOL) wiring (“interconnect”) process technology: intralevel dielectrics (ILDs), thin-film metals used in thin-film processing, and dielectric capping layers. The integration section contains an overview of patterning schemes used in damascene wiring fabrication and covers developments up to current leading-edge schemes which use extreme ultraviolet (EUV) lithography. Performance considerations are also discussed in Sect. 5.1, with a focus on BEOL metrics such as resistance and capacitance. The dielectric section reviews the history of materials used as BEOL damascene dielectrics and covers the history of low-dielectric constant (“low-k”) materials as well as recent trends concerning air gap and porous dielectrics. The thin-film metals cover developments in physical vapor deposition (PVD) tooling and processes as well as chemical vapor deposition (CVD) wetting and cap layers. In the final section, modern trends in dielectric and selective metal caps are covered.

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Chen, ST., Lanzillo, N.A., Van Nguyen, S., Nogami, T., Simon, A.H. (2023). Interconnect Processing: Integration, Dielectrics, Metals. In: Rudan, M., Brunetti, R., Reggiani, S. (eds) Springer Handbook of Semiconductor Devices . Springer Handbooks. Springer, Cham. https://doi.org/10.1007/978-3-030-79827-7_5

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