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High Throughput VLSI Architectures for CRC-12 Computation

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Advances in Decision Sciences, Image Processing, Security and Computer Vision (ICETE 2019)

Part of the book series: Learning and Analytics in Intelligent Systems ((LAIS,volume 3))

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Abstract

This paper presents high speed VLSI architectures from serial architectures to parallel architectures with improved throughput and low latency. This paper introduces IIR filter based design architecture for implementation of parallel CRC and comparison is done for the implementations of CRC-12 polynomial equation. A LFSR is used as main component for these implementations. The proposed design consists of parallel architectures of Single and multi level. These architectures had been implemented using verilog language code and simulated using Xilinx tool 14.1.

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Author information

Authors and Affiliations

  1. Department of ECE, Shri Vishnu Engineering College for Women, Bhimavaram, India

    R. Ashok Chaitanya Varma, M. Venkata Subbarao & G. R. L. V. N. Srinivasa Raju

Authors
  1. R. Ashok Chaitanya Varma
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  2. M. Venkata Subbarao
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  3. G. R. L. V. N. Srinivasa Raju
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Corresponding authors

Correspondence to R. Ashok Chaitanya Varma , M. Venkata Subbarao or G. R. L. V. N. Srinivasa Raju .

Editor information

Editors and Affiliations

  1. School of Computer Engineering, Kalinga Institute of Industrial Technology (KIIT) Deemed to be University, Bhubaneswar, Odisha, India

    Suresh Chandra Satapathy

  2. Department of CSE, CMR Technical Campus, Hyderabad, Telangana, India

    K. Srujan Raju

  3. Department of CSE, University College of Engineering, Osmania University, Hyderabad, Telangana, India

    K. Shyamala

  4. Department of ECE, University College of Engineering, Osmania University, Hyderabad, Telangana, India

    D. Rama Krishna

  5. Institute of Informatics and Telecommunications, Reshetnev Siberian State University of Science and Technology, Krasnoyarsk, Russia

    Margarita N. Favorskaya

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Ashok Chaitanya Varma, R., Venkata Subbarao, M., Srinivasa Raju, G.R.L.V.N. (2020). High Throughput VLSI Architectures for CRC-12 Computation. In: Satapathy, S.C., Raju, K.S., Shyamala, K., Krishna, D.R., Favorskaya, M.N. (eds) Advances in Decision Sciences, Image Processing, Security and Computer Vision. ICETE 2019. Learning and Analytics in Intelligent Systems, vol 3. Springer, Cham. https://doi.org/10.1007/978-3-030-24322-7_83

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