Abstract
Attempts to combine bipolar and MOS transistors on a common integrated circuit date to the late sixties (Lin et al., 1969). RCA was an early leader in the introduction of BiCMOS operational amplifiers in the mid 1970s (Polinsky et al., 1973). The next major trend was high-voltage BiCMOS pioneered at Stanford (Plummer and Meindl, 1976) and commercialized by Texas Instruments (Davis, 1979). This BIDFET technology combined CMOS, bipolar, and high-voltage lateral DMOS transistors. Most of these initial applications were in analog circuits. “Smart” power applications have evolved to include extremely high current (>20 A) and voltage (>500 V) levels. A third wave of BiCMOS applications developed in the mid 1980s. Motivated by the power dissipation constraints of bipolar circuits and the speed limitations of MOS transistors, Hitachi, Toshiba, and Motorola developed the 5-V digital BiCMOS technologies (Alvarez et al., 1984a; Higuchi et al., 1984; Miyamoto et al., 1984). Subsequent BiCMOS technologies resulted in extremely high performance microprocessors and memories such as SRAMs (Hotta et al., 1986; Bastani et al., 1987; Tambaba et al., 1988).
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Yuan, J.S., Liou, J.J. (1998). BiCMOS Devices. In: Semiconductor Device Physics and Simulation. Microdevices. Springer, Boston, MA. https://doi.org/10.1007/978-1-4899-1904-5_6
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DOI: https://doi.org/10.1007/978-1-4899-1904-5_6
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