Skip to main content
SpringerLink
Log in

MOSFET physics and modeling

  • Chapter
Analysis and Design of Mosfets

Abstract

Since the early 1980s, the metal-oxide-semiconductor field-effect transistor (MOSFET) has become the most widely used semiconductor device in very large scale integrated circuits. This is due mainly to the fact that the MOSFET has a simpler structure, costs less to fabricate, and consumes less power than its bipolar transistor counterpart. In this chapter, we will first present an overview of the MOSFET evolution, the so-called Moore’s law, and the progress of microprocessors based on MOSFETs. Then the fundamentals of semiconductor and MOS system will be introduced. This will be followed by the physics and modeling of MOSFETs, including devices with a conventional structure (i.e., conventional MOSFET), silicon-on-insulator structure [i.e.,SOIMOSFET], and lightly-doped drain structure [i.e.,LDD MOSFET]. Results obtained from device simulation will be included to aid the understanding of the MOSFET behavior and physical insight. The increasingly important short-channel, narrow-channel, hot-carrier, and quantum-mechanical effects on the MOSFET performance will also be addressed.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. J. E. Lilienfeld, “Methods and apparatus for controlling electric current,” US Patent 1745 175. Application filed Oct. 8, 1926, granted Jan. 18, 1930.

    Google Scholar 

  2. J. E. Lilienfeld, “Device for controlling electrical current,” US Patent 1 900 018. Application filed Mar. 28, 1928, granted Mar. 7, 1933.

    Google Scholar 

  3. O. Heil, “Improvements in or relating to electrical amplifiers and other control arrangements and devices,” British Patent 439 457. Application filed Mar. 4, 1935, granted Dec. 6, 1935.

    Google Scholar 

  4. D. Kahng and M. M. Atalla,“Silicon-silicon dioxide field induced surface devices,” IRE-AIEEE Solid-State Device Research Conference, Carnegie Institute of Technology, Pittsburgh, PA, 1960.

    Google Scholar 

  5. A. H. Wilson, Proc. Royal Soc., vol. 133A, p. 458, 1931.

    Google Scholar 

  6. R. S. Ohl, “Light-sensitive electrical device,” US Patent 2 402 662. Application filed May 27, 1941, granted June 25, 1946.

    Google Scholar 

  7. M. Riordan and L. Hoddeson, “The origins of the pn junction,” IEEE Spectrum, vol. 34, pp. 46–51, June 1997.

    Article  Google Scholar 

  8. W. H. Brattain, “Discovery of the transistor effect,” Adventures in Experimental Phys., vol. 5, pp. 1–31, 1976.

    Google Scholar 

  9. W. B. Shockley, “The path to the conception of the junction transistor,” IEEE Trans. Electron Dev., vol. ED-23, pp. 597–620, July 1976. Reprinted, vol. ED-31, pp. 1523–1546, Nov. 1984.

    Google Scholar 

  10. J. Bardeen and W. H. Brattain, “Three-electrode circuit element utilizing semiconductive materials,” US Patent 2 524 035. Application filed June 17, 1948, granted Oct. 3, 1950.

    Google Scholar 

  11. J. Bardeen and W. H. Brattain, “The transistor, a semi-conductor triode,” Phys. Rev., vol. 74, pp. 230–231, July 1948.

    Article  Google Scholar 

  12. W. B. Shockley, Electron and Holes in Semiconductors, Van Nostrand, New York, 1950.

    Google Scholar 

  13. W. B. Shockley, “Circuit element utilizing semiconductive material,” US Patent 2 569 347. Application filed June 26, 1948, granted Sept 25, 1951.

    Google Scholar 

  14. C. T. Sah, “Evolution of the MOS transistors-from conception to VLSI,” Proc. IEEE, vol. 76, pp. 1280–1326, Oct. 1988.

    Article  Google Scholar 

  15. T. P. Brody, “The thin film transistor-A late flowering bloom,”. IEEE Trans. Electron Device, vol. ED-31, pp. 1614–1628, Nov. 1984.

    Article  Google Scholar 

  16. F. M. Wanlass and C. T. Sah, “Nanowatt logic using field-effect metal-oxide semiconductor triodes”, IEEE Int. Solid State Cir. Conf., pp. 32–33, Feb. 1963.

    Google Scholar 

  17. F. M. Wanlass, “Low stand-by power complementary field-effect circuitry”, US Patent 3 356 858. Application filed June 18, 1963, granted Dec. 5, 1957.

    Google Scholar 

  18. J. S. Kilby, “Invention of the integrated circuit,” IEEE Trans. Electron Device, vol. ED-23, pp. 648–654, Jul. 1976.

    Article  Google Scholar 

  19. A. S. Grove, Physics and Technology of Semiconductor Devices, Wiley, New York, 1967.

    Google Scholar 

  20. R. N. Noyce, “Semiconductor device-and-lead structure”, US Patent 2 981 877. Application filed July 30, 1959, granted Apr. 25, 1961.

    Google Scholar 

  21. G. E. Moore, “Cramming more components onto integrated circuits,” Electronics, vol. 38, pp. 114–117, April 1965. See also a reprinted version in Proceedings of the IEEE, vol. 86, pp. 82–85, Jan. 1998.

    Google Scholar 

  22. G. J. Myers, A. Y. C. Yu and D. L. House, “Microprocessor technology trends,” Proc. IEEE, vol. 74, pp. 1605–1621, Dec. 1986.

    Article  Google Scholar 

  23. R. R. Schaller, “Moore’s law: past, present and future,” IEEE Spectrum, vol. 34, pp. 52–59, June 1997.

    Article  Google Scholar 

  24. A. Yu, “The future of microprocessor,” IEEE Micro, vol. 16, pp. 46–53, Dec. 1996.

    Article  Google Scholar 

  25. D. W. Marquardt, “An algorithm for least-squares estimation of non-linear parameters,” J. Soc. Ind. Appl. Math., vol. 11, pp. 431–441, 1963.

    Article  MathSciNet  MATH  Google Scholar 

  26. J. J. Liou, Advanced Semiconductor Device Physics and Modeling, Artech House, Inc., Boston, 1994.

    Google Scholar 

  27. R. H. Bube, Electronic Properties of Crystalline Solids, New York: Academic Press, 1974.

    Google Scholar 

  28. R. F. Pierret, Semiconductor Device Fundamentals, Reading: Addison Wesley, 1996.

    Google Scholar 

  29. E. H. Nicollian and J. R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology, New York: Wiley, 1982.

    Google Scholar 

  30. J. G. Fossum and A. Ortiz-Conde, “Effects of grain boundaries on the channel conductance of SOI MOSFETs,” IEEE Trans. Electron Device, vol. ED-30, pp. 933–940, Aug. 1983.

    Article  Google Scholar 

  31. D. R. Frankl, Electrical Properties ofSemiconductor Surfaces, Pergamon Press, Oxford, 1967.

    Google Scholar 

  32. MICROTEC Manual, Siborg Systems, Inc., Waterloo, Ontario, 1996.

    Google Scholar 

  33. D. R. Frankl, “Conditions of quasi-equilibrium in a semiconductor surface space-charge layer,” Surface Sci, vol. 3, pp. 101–108, Apr., 1965.

    Article  Google Scholar 

  34. R. S. C. Cobbold, Theory and Applications of Field Effects Transistors, WileyInterscience, New York, 1970.

    Google Scholar 

  35. P. Richman, MOS Field-Effect Transistors and Integrated Circuits, WileyInterscience, New York, 1973.

    Google Scholar 

  36. C. T. Hsing, D. P. Kennedy, A. D. Sutherland, and K. M. van Vliet, “Quantum mechanical determination of the potential and carrier distributions in the inversion layer of metal-oxide-semiconductor devices,” Phys. Status. Solidi (a), vol. 56, pp. 129–141, Nov. 1979.

    Article  Google Scholar 

  37. R. H. Kingston and S. F. Neustadter, “Calculation of the space-charge, electric field and free carrier concentration at the surface of a semiconductor,” J. Appl. Phys., vol. 26, pp. 718, 1955.

    Article  Google Scholar 

  38. M. Shur, Physics of Semiconductor Devices, Prentice-Hall, Englewood Cliffs, NJ, 1990.

    Google Scholar 

  39. S. M. Sze, Physics of Semiconductor Devices, 2nd ed., Wiley, New York, 1981.

    Google Scholar 

  40. Y. P. Tsividis, Operation and Modeling of the MOS Transistor, McGraw-Hill, New York, 1987.

    Google Scholar 

  41. E. H. Nicollian and J. R. Brews, MOS Physics and Technology, Wiley, New York, 1982.

    Google Scholar 

  42. H. C. Pao and C. T. Sah, “Effects of diffusion current on characteristics of metal-oxide (insulator)-semiconductor transistors,” Solid-St. Electron., vol. 9, pp. 927–937, Oct. 1966.

    Article  Google Scholar 

  43. R. F. Pierret and J. A. Shields, “Simplified long-channel MOSFET theory”, Solid-St. Electron., vol. 26, pp. 143–147, Feb. 1983

    Article  Google Scholar 

  44. G. Baccarani, M. Rudan and G. Spadini, “Analytical IGFET model including drift and diffusion currents”, IEE J. Solid-St. Electron. Device, vol. 2, pp. 62–68, March 1978.

    Article  Google Scholar 

  45. J. R. Brews, “A charge-sheet model of the MOSFET,” Solid-St. Electron., vol. 21, pp. 345–355, Feb. 1978.

    Article  Google Scholar 

  46. J. R. Brews, “Physics of the MOS transistor,” in D. Kahng, Ed., Applied Solid State Science, Suppl. 2A., New York: Academic Press, 1981.

    Google Scholar 

  47. P. Antognetti and G. Massobrio (eds.), Semiconductor Device Modeling with SPICE, New York: McGraw-Hill, 1988.

    Google Scholar 

  48. T. A. Fjeldly, B. J. Moon, and M. Shur, “Analytical solution of generalized diode equation”, IEEE Trans. Electron Dev., vol. ED-38, pp. 1976–1977, Aug. 1991.

    Article  Google Scholar 

  49. K. Lee, M. Shur, T. A. Fjeldly, T. Ytterdal, Semiconductor Device Modeling for VLSI, Prentice-Hall, Englewood Cliffs, NJ, 1993.

    Google Scholar 

  50. M. Shur, T. A. Fjeldly, T. Ytterdal, and K. Lee, “Unified MOSFET model”, Solid -State Electron., vol. 35, pp. 1795–1802, Dec. 1992.

    Article  Google Scholar 

  51. Y. P. Tsividis and K. Suyama, “MOSFET modeling for analog circuit CAD: problems and prospects,” IEEE J. Solid State Circ., vol. 29, pp. 210–216, March 1994.

    Article  Google Scholar 

  52. R. Narayanan, Z. Latif, A. Ortiz-Conde, J. J. Liou, L. Golovanova, W. Wong and F. J. García Sánchez, “A model for reverse short-channel effects in MOSFETs”, Int.Caracas Conf. on Cir. Dev. and Sys., Caracas, Venezuela, pp. 294–297, Dec. 1995.

    Google Scholar 

  53. R. Narayanan, Z. Latif, A. Ortiz-Conde, J. J. Liou, L. Golovanova, W. Wong and F. J. García Sánchez, “On the reverse short-channel effects of submicrom MOSFETs”, Proc. of Southcon, Orlando, Florida, pp. 345–349, June 1996.

    Google Scholar 

  54. T. H. Ning, P. W. Cook, R. H. Dennard, C. M. Osburn, S. E. Shuster, and H. N. Yu, “1-µm MOSFET VLSI technology: part IV--hot-electron design constraints,” IEEE Trans. Electron Devices, vol. ED-26, pp. 520–533, 1979.

    Google Scholar 

  55. P. E. Cottrell, R. R. Troutman, and T. H. Ning, “Hot electron emission in n-channel IGFETs,” IEEE Trans. Electron Devices, vol. ED-26, p. 520, 1979.

    Article  Google Scholar 

  56. C. Hu, S. C. Tam, F. C. Hsu, P. K. Ko, T. Y. Chan, and K. W. Terrill, “Hot-electron- Induced MOSFET degradation-model, monitor, and improvement,” IEEE Trans. Electron Devices, vol. ED-32, pp. 375, 1985.

    Google Scholar 

  57. C. T. Huang, C. T. Wang, C. N. Chen, M. C. Chang, and J. Fu, “Modeling hot-electron gate current in Si MOSFET’s using a coupled drift-diffusion and Monte Carlo method,” IEEE Trans.Electron Devices, vol. 39, pp. 2562, 1992.

    Article  Google Scholar 

  58. M. El-Banna and M. El-Nokali, “A simple analytical model for hot-carrier MOSFET’s,” IEEE Trans. Electron Devices, vol. 36, pp. 979, 1989.

    Article  Google Scholar 

  59. J. -J. Yang, S. Chung, P. -C. Chou, C. -H. Chen, and M. -S. Lin, “A new approach to modeling the substrate current of pre-stressed and post-stressed MOSFETs,” IEEE Trans. Electron Devices, vol. 42, p. 1113, 1995.

    Article  Google Scholar 

  60. C. Hu, “MOSFET scaling in the next decade and beyond,” Semiconductor International, vol. 17, p. 105, 1994.

    Google Scholar 

  61. J. Chung, K. N. Quader, C. G. Sodini, P. K. Ko, and C. Hu, “The effect of hot electron degradation on analog MOSFET performance,” IEDM Dig., p. 553, 1990.

    Google Scholar 

  62. W. Wong, A. Ice, and J. J. Liou, “An empirical model for the characterization of hot-carrier induced MOS device degradation,” Solid-St. Electron., to appear.

    Google Scholar 

  63. E. Takeda and N. Suzuki, “An empirical model for device degradation due to hot-carrier injection,” IEEE Electron Device Lett., vol. EDL-4, p. 111, 1983.

    Article  Google Scholar 

  64. J. R. Schrieffer, in Semiconductor Surface Physics, R. H. Kingston, Ed., University of Penn. Press, p. 55, 1957.

    Google Scholar 

  65. F. Stern and W. E. Howard, “Properties of semiconductor surface inversion layers in the electric quantum limit,” Phy. Rev., vol. 163, p. 816, 1967.

    Article  Google Scholar 

  66. S. A. Hareland, S. Krishnamurthy, S. Jallepalli, C. F. Yeap, K. Hasnat, A. F. Tasch, Jr. and C. M. Maziar, “A computationally efficient model for inversion layer quantization effects in deep submicron N-channel MOSFETs,” IEEE Trans. Electron Devices, vol. 43, p. 90, 1996.

    Article  Google Scholar 

  67. M. J. Van Dort, P. H. Woerlee, A. J. Walker, C. A. H. Juffermans, and H. Lifka, “Influence of high substrate doping levels on the threshold voltage and the mobility of deep-submicrometer MOSFETs,” IEEE Trans. Electron Devices, vol. 39, p. 932, 1992.

    Article  Google Scholar 

  68. J. A. Pals, “A general solution of the quantization in a semiconductor surface inversion layer in the electric quantum limit,” Phys. Lett. A, vol. 39, p. 101, 1972.

    Article  Google Scholar 

  69. M. Abramowitz and I. A. Stegun, Eds., Handbook of Mathematical Functions, Washington DC: U.S. GPO, 1964.

    MATH  Google Scholar 

  70. F. F. Fang and W. E. Howard, “Negative field-effect mobility on (100) Si surface,” Phys. Rev. Lett., vol. 16, p. 797, 1966.

    Article  Google Scholar 

  71. S. Ogura, P. J. Jsang, and W. W. Walker, “Design and characterization of the lightly doped drain-source (LDD) insulated gate field-effect transistor,” IEEE Electron Devices, vol. ED-27, p. 1359, 1980.

    Article  Google Scholar 

  72. J. -S. Kim, K. -S. Seo, and H. -J. Yoo, “An analytical model for the effect of graded gate oxide on the channel electric field in MOSFETs with lightly doped drain structure,” Solid-St. Electron., vol. 41, p. 650, 1997.

    Article  Google Scholar 

  73. T. Mizuno, Y. Sawada, S. Shinozaki, and O. Ozawa, “A new degradation mechanism of current drivability of asymmetrical LDD MOSFET’s,” IEDM Tech. Dig., p. 250, 1985.

    Google Scholar 

  74. Y. A. Elmansy and A. R. Boothroyd, “A simple two-dimensional model for IGFET operation in the saturation,” IEEE Trans. Electron Devices, vol. ED-24, p. 254, 1977.

    Article  Google Scholar 

  75. S. Liu, M. Hu, and S. Jong, “An analytical, physics-based linear current-voltage model for ot-carrier damaged LDD MOSFETs,” Solid-St. Electron., vol. 41, pp. 793–797, 1997.

    Article  Google Scholar 

  76. J. P. Colinge, Silicon-On-Insulator Technology: Materials to VLSI, Kluwer Academic, Boston, 1991.

    Google Scholar 

  77. M. L. Alles, “Thin-film SOI emerges,” IEEE Spectrum, vol. 34, pp. 37–45, June 1997.

    Article  Google Scholar 

  78. M. Jurczak, A. Jakunbowski and L. Lukasiak, “A review of SOI transistor models,” Microelectronics Journal, vol. 28, pp. 173–182, Feb. 1997.

    Article  Google Scholar 

  79. A. Ortiz-Conde, F. J. García Sánchez, P. E. Schmidt, and A. Sa-Neto, “The non-equilibrium inversion layer charge of the thin-film SOI MOSFET,” IEEE Trans. Electron Device, vol. ED-36, pp. 1651–1656, Sept. 1989.

    Article  Google Scholar 

  80. A. Ortiz-Conde, R. Herrera, P. E. Schmidt, F. J. García Sánchez, and J. Andrian, “Long-channel silicon-on-insulator MOSFET theory”, Solid-St. Electron., vol. 35, pp. 1291–1298, Sept. 1992.

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Department of Electrical and Computer Engineering, University of Central Florida, Orlando, Florida, USA

    J. J. Liou

  2. Electronics Engineering Department, University of Simon Bolivar, Caracas, Venezuela

    A. Ortiz-Conde & F. Garcia-Sanchez

Authors
  1. J. J. Liou
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. A. Ortiz-Conde
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. F. Garcia-Sanchez
    View author publications

    You can also search for this author in PubMed Google Scholar

Rights and permissions

Reprints and permissions

Copyright information

© 1998 Springer Science+Business Media New York

About this chapter

Cite this chapter

Liou, J.J., Ortiz-Conde, A., Garcia-Sanchez, F. (1998). MOSFET physics and modeling. In: Analysis and Design of Mosfets. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-5415-8_1

Download citation

  • DOI: https://doi.org/10.1007/978-1-4615-5415-8_1

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-7473-2

  • Online ISBN: 978-1-4615-5415-8

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation