Abstract
VLSI placement involves arranging components on a two-dimensional board such that the total interconnection wire length is minimized while avoiding component overlap and ensuring enough area is provided for routing. Placement is accomplished in a two-step procedure. The first step involves computing a good relative placement of all components while ignoring overlap and routing. The second step involves removing overlap and routing. This paper describes two new relative placement models that generate sparse LP and QP programs. The resulting LP and QP programs are efficiently solved using appropriate interior point methods. In addition, an important extension is described to reduce module overlap. Numerical results on a representative set of real test problems are presented
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J. R. Bunch and B. N. Parlett. Direct methods for solving symmetric indefinite systems of linear equations.SIAM J. Numer. Anal., 8: 639–655, 1971.
P.Chin and A. Vanneli. Computational methods for an LP model of the placement. Technical report, University of Waterloo, Ontario, 1994. UW E jade C-94–02.
CPLEX Optimization Inc. Using the CPLEX callable library and CPLEX mixed integer library. Incline Village, NV. 1993.
G. Hachtel and C. Morrison. Linear complexity algorithms for hierarchical routing.IEEE Transactions on Computer-Aided Design, 8 (l): 64–80, 1989.
S. W. Hadley, B. L. Mark, and A. Vannelli. An efficient eigenvector approach for finding netlist partitions.IEEE Transactions on Computer-Aided Design, 11 (7): 885–892, July 1992.
K. M. Hall. An r-dimensional quardratic placement algorithm.Management Science, 17 (3): 219–229, November 1991.
T.C. Hu and E. Kuh. Theory and concepts of circuit layout, inVLSI Circuit Layout: Theory and Design, pp. 3–18, IEEE Press, New York, 1985.
K. Kozminski. Benchmarks for layout synthesis — evolution and current status, inProceedings 28th ACM/IEEE Design Automation Conference, pp. 265–270, 1991.
D. G. Luenberger.Introduction to Linear and Nonlinear Programming. Addison- Wesley Pub. Co., Reading, Mass., 1973.
D. G. Schweikert and B. W. Kernighan. A proper model for the partitioning of electrical circuits. InProceedings of the 9th Design and Automation Workshop, pages 57–62, June 1979.
C. Sechen and A. Sangiovanni Vincentelli. The Timberwolf placement and routing package.IEEE J. Solid-State Circuits, 20: 510–522, 1985.
N. Sherwani.Algorithms for VLSI Physical Design Automation. Kluwer Academic Publishers, Norwell, Massachusetts, 1993.
G. Sigl, K. Doll and F. Johannes. Analytical placement: a linear or quadratic objective function?.Proc. 28th ACM/IEEE Design Automation Conference, 427–432, 1991.
L. Song and A. Vannelli. A VLSI placement method using TABU search.Microelectronics Journal, 23: 167–172, 1992.
R. J. Vanderbei. LOQO: An interior point code for quadratic programming. Technical report, Princeton University, Princeton, N.J., 1994.
R. J. Vanderbei and T. J. Carpenter. Symmetric indefinite systems for interior point methods.Mathematical Programming, 58: 1–32, 1993.
B. X. Weis and D. A. Mlynski. A new relative placement procedure based on MSST and linear programming.Proc. IEEE Int. Symp. Cir. jade Sys., 2: 564–567, 1987.
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© 1996 Kluwer Academic Publishers
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Vannelli, A., Kennings, A., Chin, P. (1996). Interior Point Approaches for the VLSI Placement Problem. In: Terlaky, T. (eds) Interior Point Methods of Mathematical Programming. Applied Optimization, vol 5. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-3449-1_13
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DOI: https://doi.org/10.1007/978-1-4613-3449-1_13
Publisher Name: Springer, Boston, MA
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