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SPARC MBus Overview

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The SPARC Technical Papers

Part of the book series: Sun Technical Reference Library ((SUN LIBRARY))

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Abstract

The move towards higher levels of integration, higher clock rates and smaller packaging are now migrating to the point where backplane buses are not required to tie significant subsystems together. MBus, Sun’s SPARC module interconnect bus provides a short physical connection media, synchronous operation with clock rates to 40 Mhz, 64 bit data transfers, and support for uniprocessor and multiprocessor implementations. What was once provided on a back-plane bus can now be built on a single board. The MBus module interconnect allows for critical subsystems to be integrated more cleanly and more cost effectively making way for the development of more economical desktop systems and embedded applications. In addition, MBus provides a roadmap for system evolution without hardware redesign thus providing considerable performance enhancements well beyond the life span any single processor evolution.

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© 1991 Sun Microsystems, Inc.

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Catanzaro, B. (1991). SPARC MBus Overview. In: Catanzaro, B.J. (eds) The SPARC Technical Papers. Sun Technical Reference Library. Springer, New York, NY. https://doi.org/10.1007/978-1-4612-3192-9_29

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  • DOI: https://doi.org/10.1007/978-1-4612-3192-9_29

  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-0-387-97634-1

  • Online ISBN: 978-1-4612-3192-9

  • eBook Packages: Springer Book Archive

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