Abstract
After the introduction of design space exploration and the discussion of related work, this chapter focuses on the methodology of the proposed design space exploration framework. As the design of software and hardware, along with the inherent question of temporal and spatial task mapping, is unfortunately not a simple query that can be answered with a simple yes or no answer, an iterative methodology is mandatory. Necessarily, system architects require a versatile framework which allows for simple and quick evaluation of arbitrary design decisions.
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Notes
- 1.
ISSs do not necessarily have to be developed in SystemC language. However, most of the today prominent IP vendors of processor cores support integration of their proprietary ISSs into a SystemC environment by encapsulating it into a TLM-2 compatible simulation model.
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Kempf, T., Ascheid, G., Leupers, R. (2011). Methodology. In: Multiprocessor Systems on Chip. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-8153-0_5
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