Abstract
In this paper, we describe how cycle-accurate processor behavior may be efficiently described using Abstract State Machines (ASMs). Given a register transfer description of the target processor, an extraction mechanism is described following the approach in [26] that extracts so called guarded register transfer patterns from the processor description. It will be shown that these may be directly transformed into a set of ASM rules which in turn provide an executable model of the processor for simulation purposes. Here, we use the ASM description language XASM from which the Gem-Mex tool [2] automatically generates a graphical simulator of a given architecture. The feasibility of this approach is demonstrated for an ARM microprocessor.
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Teich, J., Kutter, P.W., Weper, R. (2000). Description and Simulation of Microprocessor Instruction Sets Using ASMs. In: Gurevich, Y., Kutter, P.W., Odersky, M., Thiele, L. (eds) Abstract State Machines - Theory and Applications. ASM 2000. Lecture Notes in Computer Science, vol 1912. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44518-8_15
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